diff options
-rw-r--r-- | lib/CodeGen/PeepholeOptimizer.cpp | 8 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 8 | ||||
-rw-r--r-- | test/CodeGen/ARM/arm-and-tst-peephole.ll | 23 | ||||
-rw-r--r-- | test/CodeGen/ARM/long_shift.ll | 2 |
4 files changed, 23 insertions, 18 deletions
diff --git a/lib/CodeGen/PeepholeOptimizer.cpp b/lib/CodeGen/PeepholeOptimizer.cpp index e27ea15..0f2ba41 100644 --- a/lib/CodeGen/PeepholeOptimizer.cpp +++ b/lib/CodeGen/PeepholeOptimizer.cpp @@ -50,6 +50,10 @@ static cl::opt<bool> Aggressive("aggressive-ext-opt", cl::Hidden, cl::desc("Aggressive extension optimization")); +static cl::opt<bool> +DisablePeephole("disable-peephole", cl::Hidden, cl::init(false), + cl::desc("Disable the peephole optimizer")); + STATISTIC(NumReuse, "Number of extension results reused"); STATISTIC(NumEliminated, "Number of compares eliminated"); @@ -276,11 +280,9 @@ bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) { if (MI->getDesc().isCompare() && !MI->getDesc().hasUnmodeledSideEffects()) { -#if 0 - if (OptimizeCmpInstr(MI, MBB, MII)) + if (!DisablePeephole && OptimizeCmpInstr(MI, MBB, MII)) Changed = true; else -#endif ++MII; } else { Changed |= OptimizeExtInstr(MI, MBB, LocalMIs); diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index d4b832e..3257065 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -21,7 +21,6 @@ #include "llvm/Constants.h" #include "llvm/Function.h" #include "llvm/GlobalValue.h" -#include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -34,6 +33,7 @@ #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/ADT/STLExtras.h" using namespace llvm; static cl::opt<bool> @@ -1557,10 +1557,10 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask, for (unsigned IO = 0, EO = Instr.getNumOperands(); IO != EO; ++IO) { const MachineOperand &MO = Instr.getOperand(IO); - if (!MO.isReg() || !MO.isDef()) continue; + if (!MO.isReg()) continue; - // This instruction modifies CPSR before the one we want to change. We - // can't do this transformation. + // This instruction modifies or uses CPSR after the one we want to + // change. We can't do this transformation. if (MO.getReg() == ARM::CPSR) return false; } diff --git a/test/CodeGen/ARM/arm-and-tst-peephole.ll b/test/CodeGen/ARM/arm-and-tst-peephole.ll index 93cc123..461150f 100644 --- a/test/CodeGen/ARM/arm-and-tst-peephole.ll +++ b/test/CodeGen/ARM/arm-and-tst-peephole.ll @@ -1,10 +1,15 @@ -; RUN: llc < %s -march=arm -; FIXME: llc < %s -march=thumb | FileCheck -check-prefix=THUMB %s -; FIXME: llc < %s -march=thumb -mattr=+thumb2 | FileCheck -check-prefix=T2 %s +; RUN: llc < %s -march=arm | FileCheck -check-prefix=ARM %s +; RUN: llc < %s -march=thumb | FileCheck -check-prefix=THUMB %s +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck -check-prefix=T2 %s + +; FIXME: The -march=thumb test doesn't change if -disable-peephole is specified. %struct.Foo = type { i8* } -define %struct.Foo* @_ZN3Foo7collectEj(%struct.Foo* %this, i32 %acc) nounwind readonly align 2 { +; ARM: foo +; THUMB: foo +; T2: foo +define %struct.Foo* @foo(%struct.Foo* %this, i32 %acc) nounwind readonly align 2 { entry: %scevgep = getelementptr %struct.Foo* %this, i32 1 br label %tailrecurse @@ -18,8 +23,8 @@ tailrecurse: ; preds = %sw.bb, %entry %tmp2 = load i8** %scevgep5 %0 = ptrtoint i8* %tmp2 to i32 -; CHECK: ands r12, r12, #3 -; CHECK-NEXT: beq +; ARM: ands r12, r12, #3 +; ARM-NEXT: beq ; THUMB: movs r5, #3 ; THUMB-NEXT: mov r6, r4 @@ -66,7 +71,7 @@ sw.epilog: ; preds = %tailrecurse.switch %struct.S = type { i8* (i8*)*, [1 x i8] } -; CHECK: bar +; ARM: bar ; THUMB: bar ; T2: bar define internal zeroext i8 @bar(%struct.S* %x, %struct.S* nocapture %y) nounwind readonly { @@ -74,7 +79,7 @@ entry: %0 = getelementptr inbounds %struct.S* %x, i32 0, i32 1, i32 0 %1 = load i8* %0, align 1 %2 = zext i8 %1 to i32 -; CHECK: ands +; ARM: ands ; THUMB: ands ; T2: ands %3 = and i32 %2, 112 @@ -85,7 +90,7 @@ bb: ; preds = %entry %5 = getelementptr inbounds %struct.S* %y, i32 0, i32 1, i32 0 %6 = load i8* %5, align 1 %7 = zext i8 %6 to i32 -; CHECK: andsne +; ARM: andsne ; THUMB: ands ; T2: andsne %8 = and i32 %7, 112 diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll index 45ed209..5e4f573 100644 --- a/test/CodeGen/ARM/long_shift.ll +++ b/test/CodeGen/ARM/long_shift.ll @@ -1,6 +1,4 @@ ; RUN: llc < %s -march=arm | FileCheck %s -; XFAIL: * -; FIXME: Fix after peephole optimizer is fixed. define i64 @f0(i64 %A, i64 %B) { ; CHECK: f0 |