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-rw-r--r--lib/Target/ARM/ARMFastISel.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index c2a0551..5884da3 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -57,6 +57,7 @@ class ARMFastISel : public FastISel {
const TargetMachine &TM;
const TargetInstrInfo &TII;
const TargetLowering &TLI;
+ const ARMFunctionInfo *AFI;
public:
explicit ARMFastISel(FunctionLoweringInfo &funcInfo)
@@ -65,6 +66,7 @@ class ARMFastISel : public FastISel {
TII(*TM.getInstrInfo()),
TLI(*TM.getTargetLowering()) {
Subtarget = &TM.getSubtarget<ARMSubtarget>();
+ AFI = funcInfo.MF->getInfo<ARMFunctionInfo>();
}
// Code from FastISel.cpp.
@@ -363,7 +365,6 @@ bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
if (!ARMComputeRegOffset(I, Reg, Offset))
return false;
-
unsigned ResultReg = createResultReg(ARM::GPRRegisterClass);
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(ARM::LDR), ResultReg)
@@ -373,6 +374,9 @@ bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
}
bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
+ // No Thumb-1 for now.
+ if (AFI->isThumbFunction() && !AFI->isThumb2Function()) return false;
+
switch (I->getOpcode()) {
case Instruction::Load:
return ARMSelectLoad(I);