diff options
Diffstat (limited to 'test/CodeGen/ARM/vld2.ll')
| -rw-r--r-- | test/CodeGen/ARM/vld2.ll | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/vld2.ll b/test/CodeGen/ARM/vld2.ll index 3fdd7b7..29b3794 100644 --- a/test/CodeGen/ARM/vld2.ll +++ b/test/CodeGen/ARM/vld2.ll @@ -56,6 +56,21 @@ define <2 x float> @vld2f(float* %A) nounwind { ret <2 x float> %tmp4 } +;Check for a post-increment updating load. +define <2 x float> @vld2f_update(float** %ptr) nounwind { +;CHECK: vld2f_update: +;CHECK: vld2.32 {d16, d17}, [r1]! + %A = load float** %ptr + %tmp0 = bitcast float* %A to i8* + %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1) + %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1 + %tmp4 = fadd <2 x float> %tmp2, %tmp3 + %tmp5 = getelementptr float* %A, i32 4 + store float* %tmp5, float** %ptr + ret <2 x float> %tmp4 +} + define <1 x i64> @vld2i64(i64* %A) nounwind { ;CHECK: vld2i64: ;Check the alignment value. Max for this instruction is 128 bits: @@ -79,6 +94,20 @@ define <16 x i8> @vld2Qi8(i8* %A) nounwind { ret <16 x i8> %tmp4 } +;Check for a post-increment updating load with register increment. +define <16 x i8> @vld2Qi8_update(i8** %ptr, i32 %inc) nounwind { +;CHECK: vld2Qi8_update: +;CHECK: vld2.8 {d16, d17, d18, d19}, [r2, :128], r1 + %A = load i8** %ptr + %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 16) + %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 + %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 + %tmp4 = add <16 x i8> %tmp2, %tmp3 + %tmp5 = getelementptr i8* %A, i32 %inc + store i8* %tmp5, i8** %ptr + ret <16 x i8> %tmp4 +} + define <8 x i16> @vld2Qi16(i16* %A) nounwind { ;CHECK: vld2Qi16: ;Check the alignment value. Max for this instruction is 256 bits: |