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-rw-r--r--test/CodeGen/X86/avx512-mov.ll32
1 files changed, 16 insertions, 16 deletions
diff --git a/test/CodeGen/X86/avx512-mov.ll b/test/CodeGen/X86/avx512-mov.ll
index 91242b1..13e6843 100644
--- a/test/CodeGen/X86/avx512-mov.ll
+++ b/test/CodeGen/X86/avx512-mov.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
; CHECK-LABEL: @test1
-; CHECK: vmovdz %xmm0, %eax
+; CHECK: vmovd %xmm0, %eax ## encoding: [0x62
; CHECK: ret
define i32 @test1(float %x) {
%res = bitcast float %x to i32
@@ -9,7 +9,7 @@ define i32 @test1(float %x) {
}
; CHECK-LABEL: @test2
-; CHECK: vmovdz %edi
+; CHECK: vmovd %edi, %xmm0 ## encoding: [0x62
; CHECK: ret
define <4 x i32> @test2(i32 %x) {
%res = insertelement <4 x i32>undef, i32 %x, i32 0
@@ -17,7 +17,7 @@ define <4 x i32> @test2(i32 %x) {
}
; CHECK-LABEL: @test3
-; CHECK: vmovqz %rdi
+; CHECK: vmovq %rdi, %xmm0 ## encoding: [0x62
; CHECK: ret
define <2 x i64> @test3(i64 %x) {
%res = insertelement <2 x i64>undef, i64 %x, i32 0
@@ -25,7 +25,7 @@ define <2 x i64> @test3(i64 %x) {
}
; CHECK-LABEL: @test4
-; CHECK: vmovdz (%rdi)
+; CHECK: vmovd (%rdi), %xmm0 ## encoding: [0x62
; CHECK: ret
define <4 x i32> @test4(i32* %x) {
%y = load i32* %x
@@ -34,7 +34,7 @@ define <4 x i32> @test4(i32* %x) {
}
; CHECK-LABEL: @test5
-; CHECK: vmovssz %xmm0, (%rdi)
+; CHECK: vmovss %xmm0, (%rdi) ## encoding: [0x62
; CHECK: ret
define void @test5(float %x, float* %y) {
store float %x, float* %y, align 4
@@ -42,7 +42,7 @@ define void @test5(float %x, float* %y) {
}
; CHECK-LABEL: @test6
-; CHECK: vmovsdz %xmm0, (%rdi)
+; CHECK: vmovsd %xmm0, (%rdi) ## encoding: [0x62
; CHECK: ret
define void @test6(double %x, double* %y) {
store double %x, double* %y, align 8
@@ -50,7 +50,7 @@ define void @test6(double %x, double* %y) {
}
; CHECK-LABEL: @test7
-; CHECK: vmovssz (%rdi), %xmm0
+; CHECK: vmovss (%rdi), %xmm0 ## encoding: [0x62
; CHECK: ret
define float @test7(i32* %x) {
%y = load i32* %x
@@ -59,7 +59,7 @@ define float @test7(i32* %x) {
}
; CHECK-LABEL: @test8
-; CHECK: vmovdz %xmm0, %eax
+; CHECK: vmovd %xmm0, %eax ## encoding: [0x62
; CHECK: ret
define i32 @test8(<4 x i32> %x) {
%res = extractelement <4 x i32> %x, i32 0
@@ -67,7 +67,7 @@ define i32 @test8(<4 x i32> %x) {
}
; CHECK-LABEL: @test9
-; CHECK: vmovqz %xmm0, %rax
+; CHECK: vmovq %xmm0, %rax ## encoding: [0x62
; CHECK: ret
define i64 @test9(<2 x i64> %x) {
%res = extractelement <2 x i64> %x, i32 0
@@ -75,7 +75,7 @@ define i64 @test9(<2 x i64> %x) {
}
; CHECK-LABEL: @test10
-; CHECK: vmovdz (%rdi)
+; CHECK: vmovd (%rdi), %xmm0 ## encoding: [0x62
; CHECK: ret
define <4 x i32> @test10(i32* %x) {
%y = load i32* %x, align 4
@@ -84,7 +84,7 @@ define <4 x i32> @test10(i32* %x) {
}
; CHECK-LABEL: @test11
-; CHECK: vmovssz (%rdi)
+; CHECK: vmovss (%rdi), %xmm0 ## encoding: [0x62
; CHECK: ret
define <4 x float> @test11(float* %x) {
%y = load float* %x, align 4
@@ -93,7 +93,7 @@ define <4 x float> @test11(float* %x) {
}
; CHECK-LABEL: @test12
-; CHECK: vmovsdz (%rdi)
+; CHECK: vmovsd (%rdi), %xmm0 ## encoding: [0x62
; CHECK: ret
define <2 x double> @test12(double* %x) {
%y = load double* %x, align 8
@@ -102,7 +102,7 @@ define <2 x double> @test12(double* %x) {
}
; CHECK-LABEL: @test13
-; CHECK: vmovqz %rdi
+; CHECK: vmovq %rdi, %xmm0 ## encoding: [0x62
; CHECK: ret
define <2 x i64> @test13(i64 %x) {
%res = insertelement <2 x i64>zeroinitializer, i64 %x, i32 0
@@ -110,7 +110,7 @@ define <2 x i64> @test13(i64 %x) {
}
; CHECK-LABEL: @test14
-; CHECK: vmovdz %edi
+; CHECK: vmovd %edi, %xmm0 ## encoding: [0x62
; CHECK: ret
define <4 x i32> @test14(i32 %x) {
%res = insertelement <4 x i32>zeroinitializer, i32 %x, i32 0
@@ -118,7 +118,7 @@ define <4 x i32> @test14(i32 %x) {
}
; CHECK-LABEL: @test15
-; CHECK: vmovdz (%rdi)
+; CHECK: vmovd (%rdi), %xmm0 ## encoding: [0x62
; CHECK: ret
define <4 x i32> @test15(i32* %x) {
%y = load i32* %x, align 4