diff options
Diffstat (limited to 'test/MC/Mips/mips64')
-rw-r--r-- | test/MC/Mips/mips64/invalid-mips64r2.s | 4 | ||||
-rw-r--r-- | test/MC/Mips/mips64/valid-xfail.s | 8 | ||||
-rw-r--r-- | test/MC/Mips/mips64/valid.s | 8 |
3 files changed, 8 insertions, 12 deletions
diff --git a/test/MC/Mips/mips64/invalid-mips64r2.s b/test/MC/Mips/mips64/invalid-mips64r2.s index 1a5abb6..1caa2bd 100644 --- a/test/MC/Mips/mips64/invalid-mips64r2.s +++ b/test/MC/Mips/mips64/invalid-mips64r2.s @@ -14,12 +14,8 @@ dsbh $v1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled ei $14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled - madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mfhc1 $s8,$f24 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled - msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mthc1 $zero,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled - nmadd.s $f0,$f5,$f25,$f12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled - nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled pause # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips64/valid-xfail.s b/test/MC/Mips/mips64/valid-xfail.s index e5455f5..7d1eb92 100644 --- a/test/MC/Mips/mips64/valid-xfail.s +++ b/test/MC/Mips/mips64/valid-xfail.s @@ -62,9 +62,7 @@ cvt.s.pu $f14,$f25 dmfc0 $10,c0_watchhi,2 dmtc0 $15,c0_datalo - madd.d $f18,$f19,$f26,$f20 madd.ps $f22,$f3,$f14,$f3 - madd.s $f1,$f31,$f19,$f25 mov.ps $f22,$f17 movf.ps $f10,$f28,$fcc6 movn.ps $f31,$f31,$s3 @@ -72,17 +70,11 @@ movz.ps $f18,$f17,$ra msgn.qh $v0,$v24,$v20 msgn.qh $v12,$v21,$v0[1] - msub.d $f10,$f1,$f31,$f18 msub.ps $f12,$f14,$f29,$f17 - msub.s $f12,$f19,$f10,$f16 mul.ps $f14,$f0,$f16 neg.ps $f19,$f13 - nmadd.d $f18,$f9,$f14,$f19 nmadd.ps $f27,$f4,$f9,$f25 - nmadd.s $f0,$f5,$f25,$f12 - nmsub.d $f30,$f8,$f16,$f30 nmsub.ps $f6,$f12,$f14,$f17 - nmsub.s $f1,$f24,$f19,$f4 pll.ps $f25,$f9,$f30 plu.ps $f1,$f26,$f29 pul.ps $f9,$f30,$f26 diff --git a/test/MC/Mips/mips64/valid.s b/test/MC/Mips/mips64/valid.s index 032777e..f481a28 100644 --- a/test/MC/Mips/mips64/valid.s +++ b/test/MC/Mips/mips64/valid.s @@ -144,6 +144,8 @@ madd $zero,$9 maddu $s3,$gp maddu $24,$s2 + madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1] + madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0] mfc0 $a2,$14,1 mfc1 $a3,$f27 mfhi $s3 @@ -169,6 +171,8 @@ movz.s $f25,$f7,$v1 msub $s7,$k1 msubu $15,$a1 + msub.d $f10, $f2, $f30, $f18 # encoding: [0x4c,0x52,0xf2,0xa9] + msub.s $f12, $f18, $f10, $f16 # encoding: [0x4e,0x50,0x53,0x28] mtc0 $9,$29,3 mtc1 $s8,$f9 mthi $s1 @@ -185,6 +189,10 @@ negu $2,$3 # CHECK: negu $2, $3 # encoding: [0x00,0x03,0x10,0x23] neg.d $f27,$f18 neg.s $f1,$f15 + nmadd.d $f18, $f8, $f14, $f20 # encoding: [0x4d,0x14,0x74,0xb1] + nmadd.s $f0, $f4, $f24, $f12 # encoding: [0x4c,0x8c,0xc0,0x30] + nmsub.d $f30, $f8, $f16, $f30 # encoding: [0x4d,0x1e,0x87,0xb9] + nmsub.s $f0, $f24, $f20, $f4 # encoding: [0x4f,0x04,0xa0,0x38] nop nor $a3,$zero,$a3 or $12,$s0,$sp |