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* Convert ScalarEvolution to use BumpPtrAllocator and FoldingSet, insteadDan Gohman2009-06-273-167/+244
| | | | | | | of a team of individual allocations and a team of std::maps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74393 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a redundant #include.Dan Gohman2009-06-271-1/+0
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* Change SCEVExpander to use an IRBuilder to emit instructions.Dan Gohman2009-06-272-91/+83
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* Add a 'const' in a comment.Dan Gohman2009-06-271-1/+1
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* Simplify a bitAnton Korobeynikov2009-06-276-80/+70
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* ARM refactoring. Step 2: split RegisterInfoAnton Korobeynikov2009-06-279-694/+1075
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* Add ThumbInstrInfo.cpp to the CMake makefilesDouglas Gregor2009-06-271-0/+1
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* remove a bunch of fixmes (old checking code) and commonize all theChris Lattner2009-06-271-87/+29
| | | | | | | target-specific operand printing functionality. Yay. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74379 91177308-0d34-0410-b5e6-96231b3b80d8
* pull @GOT, @GOTOFF, @GOTPCREL handling into isel from the asmprinter.Chris Lattner2009-06-272-40/+23
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* simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate.Chris Lattner2009-06-273-19/+4
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* When a value is used multiple times within a single PHI, instructionsDan Gohman2009-06-272-3/+48
| | | | | | | | | inserted to replace that value must dominate all of of the basic blocks associated with the uses of the value in the PHI, not just one of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74376 91177308-0d34-0410-b5e6-96231b3b80d8
* fix clang/test/CodeGenObjC/try.m, a basereg doesn't mean no global anymore.Chris Lattner2009-06-271-5/+3
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* fix a bunch of failures in the X86-64 JIT by tolerating RIP asChris Lattner2009-06-271-3/+5
| | | | | | | a base register. We just ignore it for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74374 91177308-0d34-0410-b5e6-96231b3b80d8
* factor some logic out into a helper function, allow remat of loads from constantChris Lattner2009-06-272-6/+26
| | | | | | | globals. This implements remat-constant.ll even without aggressive-remat. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74373 91177308-0d34-0410-b5e6-96231b3b80d8
* Reimplement rip-relative addressing in the X86-64 backend. The newChris Lattner2009-06-2711-166/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implementation primarily differs from the former in that the asmprinter doesn't make a zillion decisions about whether or not something will be RIP relative or not. Instead, those decisions are made by isel lowering and propagated through to the asm printer. To achieve this, we: 1. Represent RIP relative addresses by setting the base of the X86 addr mode to X86::RIP. 2. When ISel Lowering decides that it is safe to use RIP, it lowers to X86ISD::WrapperRIP. When it is unsafe to use RIP, it lowers to X86ISD::Wrapper as before. 3. This removes isRIPRel from X86ISelAddressMode, representing it with a basereg of RIP instead. 4. The addressing mode matching logic in isel is greatly simplified. 5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate passed through various printoperand routines is gone now. 6. The various symbol printing routines in asmprinter now no longer infer when to emit (%rip), they just print the symbol. I think this is a big improvement over the previous situation. It does have two small caveats though: 1. I implemented a horrible "no-rip" modifier for the inline asm "P" constraint modifier. This is a short term hack, there is a much better, but more involved, solution. 2. I had to xfail an -aggressive-remat testcase because it isn't handling the use of RIP in the constant-pool reading instruction. This specific test is easy to fix without -aggressive-remat, which I intend to do next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74372 91177308-0d34-0410-b5e6-96231b3b80d8
* remove some unneeded eh info.Chris Lattner2009-06-273-4/+4
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* When doing remat, don't consider uses of non-allocatable physregs. Patch Chris Lattner2009-06-271-0/+4
| | | | | | | by Evan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74370 91177308-0d34-0410-b5e6-96231b3b80d8
* Renaming for consistency.Evan Cheng2009-06-275-115/+120
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* testcase for PR4466Chris Lattner2009-06-271-0/+16
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* Fix PR4466 by making fastisel set operand flags correctly.Chris Lattner2009-06-272-7/+14
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* fix a typo that GCC should have caught that causes crashes with -view-*-dagsChris Lattner2009-06-271-1/+1
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* Remove outdated comment.David Goodwin2009-06-261-4/+0
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* When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has ↵David Goodwin2009-06-262-0/+13
| | | | | | a narrow version and eor(i) does not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some testcases for some of the recent ScalarEvolution bug fixes.Dan Gohman2009-06-262-0/+419
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* Incorporate the insertion point into the key of SCEVExpander's CSE map.Dan Gohman2009-06-263-167/+78
| | | | | | | | | | | | | | | This helps it avoid reusing an instruction that doesn't dominate all of the users, in cases where the original instruction was inserted before all of the users were known. This may result in redundant expansions of sub-expressions that depend on loop-unpredictable values in some cases, however this isn't very common, and it primarily impacts IndVarSimplify, so GVN can be expected to clean these up. This eliminates the need for IndVarSimplify's FixUsesBeforeDefs, which fixes several bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74352 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused routines.Devang Patel2009-06-262-48/+0
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* Add feature flags for AVX and FMA and fix some SSE4A feature flagDavid Greene2009-06-264-3/+38
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* Thumb-2 testsDavid Goodwin2009-06-2627-15/+318
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* Fix ScalarEvolution::getAddRecExpr's code which canonicalized theDan Gohman2009-06-261-2/+23
| | | | | | | | | nesting order of nested AddRec expressions to skip the transformation if it would introduce an AddRec with operands not loop-invariant with respect to its loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74343 91177308-0d34-0410-b5e6-96231b3b80d8
* NewNightlyTest.pl: Support -submit-aux with -no-submit (run that aux script,Daniel Dunbar2009-06-261-2/+6
| | | | | | | instead of skipping). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74341 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing argument for vtbx intrinsic.Bob Wilson2009-06-261-2/+2
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* Fix SCEVAddRecExpr::isLoopInvariant to test if all of its operandsDan Gohman2009-06-261-5/+15
| | | | | | | are loop invariant, not just the start operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74338 91177308-0d34-0410-b5e6-96231b3b80d8
* remove unwind info, add test for asmprinting of jump table labels with (%rip)Chris Lattner2009-06-261-1/+4
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* Add x86 support for 'n' inline asm modifier. This will be handled target ↵Evan Cheng2009-06-262-0/+19
| | | | | | independently as part of MC work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8
* simplify printing of MO_ExternalSymbol in a non-pcrel context.Chris Lattner2009-06-261-23/+11
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* Add intrinsics for ARM NEON vtbl and vtbx operations.Bob Wilson2009-06-261-0/+9
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* Privatize some data.Owen Anderson2009-06-261-2/+2
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* Constify this value.Owen Anderson2009-06-261-3/+2
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* Split thumb-related stuff into separate classes.Anton Korobeynikov2009-06-2612-349/+596
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* add %rip to the GR64 register class. Lets avoid allocating it to anything ↵Chris Lattner2009-06-262-3/+6
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* Move all the TLS processing logic into isel, don't do it in asmprinter at all.Chris Lattner2009-06-263-59/+123
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* make sure to propagate operand flags in SelectTLSADDRAddr properly.Chris Lattner2009-06-261-1/+2
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* fix a really subtle bug in the cross section of aliases and TLS:Chris Lattner2009-06-262-10/+4
| | | | | | | | | | | | the SelectionDAG::getGlobalAddress function properly looks through aliases to determine thread-localness, but then passes the GV* down to GlobalAddressSDNode::GlobalAddressSDNode which does not. Instead of passing down isTarget, just pass down the predetermined node opcode. This fixes some assertions with out of tree changes I'm working on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74325 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb-2 has CLZ.David Goodwin2009-06-262-1/+9
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* Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".David Goodwin2009-06-264-7/+7
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* Delete LoopPass::runOnFunctionBody. It was never used or implemented.Jeffrey Yasskin2009-06-261-3/+0
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* Get rid of these cache variables, which are a holdover from the days whenOwen Anderson2009-06-262-76/+30
| | | | | | | we had multiple type planes and these lookups were expensive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74319 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this const.Owen Anderson2009-06-261-1/+1
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* minor cleanup/framework changes.Chris Lattner2009-06-261-3/+11
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* Privatize some variables.Owen Anderson2009-06-261-5/+4
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