| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Don't narrow the load and store in a load+twiddle+store sequence unless | Dan Gohman | 2010-09-02 | 1 | -1/+2 |
| * | Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECT... | Nate Begeman | 2010-07-27 | 1 | -2/+10 |
| * | Remove r108639 now that it is handled by InstCombine instead. | Owen Anderson | 2010-07-19 | 1 | -13/+0 |
| * | Add a DAGCombine xform to fold away redundant float->double->float conversion... | Owen Anderson | 2010-07-18 | 1 | -0/+13 |
| * | Convert some tab stops into spaces. | Duncan Sands | 2010-07-12 | 1 | -28/+28 |
| * | Reenable DAG combining for vector shuffles. It looks like it was temporarily | Bob Wilson | 2010-07-09 | 1 | -2/+0 |
| * | Merge the duplicated iabs optimization in DAGCombiner and let it detected a f... | Benjamin Kramer | 2010-07-08 | 1 | -30/+26 |
| * | Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument f... | Evan Cheng | 2010-07-07 | 1 | -22/+23 |
| * | Propagate debug loc. | Devang Patel | 2010-07-06 | 1 | -2/+2 |
| * | Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they | Bob Wilson | 2010-06-28 | 1 | -1/+2 |
| * | Remove variables which are assigned to but for which the value | Duncan Sands | 2010-06-25 | 1 | -1/+0 |
| * | Reapply r106634, now that the bug it exposed is fixed. | Dan Gohman | 2010-06-24 | 1 | -8/+37 |
| * | Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner... | Daniel Dunbar | 2010-06-23 | 1 | -37/+8 |
| * | Some targets don't require the fencing MEMBARRIER instructions surrounding | Jim Grosbach | 2010-06-23 | 1 | -0/+55 |
| * | Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass, | Dan Gohman | 2010-06-18 | 1 | -8/+37 |
| * | Fix another variant of PR 7191. Also add a testcase | Dale Johannesen | 2010-05-25 | 1 | -1/+5 |
| * | Fix PR 7191. I have been unable to create a .ll file that fails, sorry. | Dale Johannesen | 2010-05-25 | 1 | -2/+10 |
| * | Clean up extra whitespace. | Bob Wilson | 2010-05-21 | 1 | -1/+0 |
| * | Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements | Bob Wilson | 2010-05-21 | 1 | -0/+7 |
| * | Optimize away insertelement of an undef value. This shows up in | Bob Wilson | 2010-05-19 | 1 | -0/+4 |
| * | Intrinsics which do a vector compare (results are all zero or all ones) are m... | Evan Cheng | 2010-05-19 | 1 | -6/+75 |
| * | Sink dag combine's post index load / store code that swap base ptr and index ... | Evan Cheng | 2010-05-18 | 1 | -4/+0 |
| * | FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (... | Evan Cheng | 2010-05-18 | 1 | -7/+8 |
| * | Be careful with operand promotion. For a binary operation, the source operand... | Evan Cheng | 2010-05-10 | 1 | -4/+10 |
| * | Apply a patch from Jan Sjodin to fix a compiler abort on vector | Dan Gohman | 2010-04-30 | 1 | -9/+24 |
| * | Try operation promotion only if regular dag combine and target-specific ones ... | Evan Cheng | 2010-04-28 | 1 | -15/+42 |
| * | - When legal, promote a load to zextload rather than ext load. | Evan Cheng | 2010-04-27 | 1 | -6/+20 |
| * | When a load operand is promoted to an extload, replace other uses with uses o... | Evan Cheng | 2010-04-24 | 1 | -30/+67 |
| * | Apply a fix for a vector setcc dagcombine from Jan Sjodin. No | Dan Gohman | 2010-04-24 | 1 | -1/+2 |
| * | Code refactoring. | Evan Cheng | 2010-04-23 | 1 | -11/+12 |
| * | - It's not safe to promote rotates (at least not trivially). | Evan Cheng | 2010-04-22 | 1 | -25/+46 |
| * | The visitXOR method can return the same SDNode. If so, we don't want to delete | Bill Wendling | 2010-04-20 | 1 | -1/+1 |
| * | More progress on promoting i16 operations to i32 for x86. Work in progress. | Evan Cheng | 2010-04-19 | 1 | -9/+118 |
| * | More work to allow dag combiner to promote 16-bit ops to 32-bit. | Evan Cheng | 2010-04-17 | 1 | -24/+96 |
| * | (i32 sext_in_reg (i32 aext (i16 x)), i16) -> (i32 sext x). No known test case... | Evan Cheng | 2010-04-16 | 1 | -1/+2 |
| * | Adding support for dag combiner to promote operations for profit. This requir... | Evan Cheng | 2010-04-16 | 1 | -6/+47 |
| * | enhance the load/store narrowing optimization to handle a | Chris Lattner | 2010-04-15 | 1 | -5/+18 |
| * | teach codegen to turn trunc(zextload) into load when possible. | Chris Lattner | 2010-04-15 | 1 | -1/+1 |
| * | add a simple dag combine to replace trivial shl+lshr with | Chris Lattner | 2010-04-15 | 1 | -0/+9 |
| * | Implement rdar://7860110 (also in target/readme.txt) narrowing | Chris Lattner | 2010-04-15 | 1 | -22/+164 |
| * | Add const qualifiers to CodeGen's use of LLVM IR constructs. | Dan Gohman | 2010-04-15 | 1 | -2/+2 |
| * | Remove unnecessary parens. | Dan Gohman | 2010-04-12 | 1 | -2/+2 |
| * | Fix -Wsign-compare warning (issued by clang++). | Ted Kremenek | 2010-04-08 | 1 | -1/+1 |
| * | fix 80 col violation, patch by Alastair Lynn | Chris Lattner | 2010-04-07 | 1 | -1/+2 |
| * | Fix sdisel memcpy, memset, memmove lowering: | Evan Cheng | 2010-04-01 | 1 | -23/+23 |
| * | fix PR6533 by updating the br(xor) code to remember the case | Chris Lattner | 2010-03-10 | 1 | -5/+7 |
| * | Fix another bitwidth calculation to handle vector types; based on a | Dan Gohman | 2010-03-10 | 1 | -1/+1 |
| * | Fix more code to work properly with vector operands. Based on | Dan Gohman | 2010-03-04 | 1 | -5/+5 |
| * | Use APInt instead of zext value. | Bill Wendling | 2010-03-03 | 1 | -1/+1 |
| * | This test case: | Bill Wendling | 2010-03-03 | 1 | -5/+7 |
