external_llvm.git - Android's llvm

	Commit message (Expand)	Author	Age	Files	Lines
*	Change TargetLowering::getRepRegClassFor to take an MVT, instead of	Patrik Hagglund	2012-12-13	1	-1/+1
*	Revert EVT->MVT changes, r169836-169851, due to buildbot failures.	Patrik Hagglund	2012-12-11	1	-1/+1
*	Change TargetLowering::getRepRegClassFor to take an MVT, instead of	Patrik Hagglund	2012-12-11	1	-1/+1
*	Use the new script to sort the includes of every file under lib.	Chandler Carruth	2012-12-03	1	-10/+10
*	ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.	Andrew Trick	2012-11-06	1	-5/+6
*	Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't use	Evan Cheng	2012-10-17	1	-2/+1
*	Release build: guard dump functions with	Manman Ren	2012-09-11	1	-2/+2
*	Release build: guard dump functions with "ifndef NDEBUG"	Manman Ren	2012-09-06	1	-0/+4
*	Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.	Andrew Trick	2012-04-28	1	-26/+58
*	Temporarily revert r155668: Fix the SD scheduler to avoid gluing.	Andrew Trick	2012-04-27	1	-4/+2
*	Fix the SD scheduler to avoid gluing the same node twice.	Andrew Trick	2012-04-26	1	-3/+5
*	Insert the debugging instructions in one fell-swoop so that it doesn't call the	Bill Wendling	2012-03-14	1	-7/+8
*	misched preparation: rename core scheduler methods for consistency.	Andrew Trick	2012-03-07	1	-10/+10
*	misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.	Andrew Trick	2012-03-07	1	-7/+13
*	misched preparation: modularize schedule emission.	Andrew Trick	2012-03-07	1	-3/+43
*	misched preparation: modularize schedule printing.	Andrew Trick	2012-03-07	1	-0/+9
*	misched preparation: modularize schedule verification.	Andrew Trick	2012-03-07	1	-0/+15
*	Cleanup in preparation for misched: Move DAG visualization logic.	Andrew Trick	2012-03-07	1	-0/+5
*	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	Evan Cheng	2011-07-01	1	-2/+2
*	Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries)...	Evan Cheng	2011-06-29	1	-0/+1
*	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	Evan Cheng	2011-06-28	1	-7/+7
*	pre-RA-sched: Cleanup register pressure tracking.	Andrew Trick	2011-06-27	1	-9/+1
*	The scheduler needs to be aware on the existence of untyped nodes when it per...	Owen Anderson	2011-06-24	1	-1/+2
*	Don't allocate empty read-only SmallVectors during SelectionDAG deallocation.	Benjamin Kramer	2011-06-18	1	-1/+1
*	Added -stress-sched flag in the Asserts build.	Andrew Trick	2011-06-15	1	-1/+1
*	Be careful about scheduling nodes above previous calls. It increase usages of	Evan Cheng	2011-04-26	1	-0/+19
*	Fix a ton of comment typos found by codespell. Patch by	Chris Lattner	2011-04-15	1	-1/+1
*	In the pre-RA scheduler, maintain cmp+br proximity.	Andrew Trick	2011-04-14	1	-0/+8
*	Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor lat...	Andrew Trick	2011-04-13	1	-46/+14
*	Revert 129383. It causes some targets to hit a scheduler assert.	Andrew Trick	2011-04-12	1	-7/+46
*	PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.	Andrew Trick	2011-04-12	1	-46/+7
*	Added a check in the preRA scheduler for potential interference on a	Andrew Trick	2011-04-07	1	-0/+46
*	Improve pre-RA-sched register pressure tracking for duplicate operands.	Andrew Trick	2011-03-09	1	-1/+5
*	Fix some latent bugs if the nodes are unschedulable. We'd gotten away	Eric Christopher	2011-03-08	1	-0/+4
*	Fix for -sched-high-latency-cycles in sched=list-ilp mode.	Andrew Trick	2011-03-05	1	-1/+3
*	Increased the register pressure limit on x86_64 from 8 to 12	Andrew Trick	2011-03-05	1	-1/+13
*	Introducing a new method of tracking register pressure. We can't	Andrew Trick	2011-02-04	1	-1/+73
*	whitespace	Andrew Trick	2011-02-03	1	-18/+18
*	Reapply 124301	Devang Patel	2011-01-27	1	-1/+5
*	Revert 124301.	Devang Patel	2011-01-26	1	-5/+1
*	Process valid SDDbgValues even if the node does not have any order assigned.	Devang Patel	2011-01-26	1	-1/+5
*	Refactor.	Devang Patel	2011-01-26	1	-19/+30
*	This assertion is too restrictive, it does not apply for dangling dbg value n...	Devang Patel	2011-01-25	1	-8/+0
*	flags -> glue for selectiondag	Chris Lattner	2010-12-23	1	-49/+48
*	rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for	Chris Lattner	2010-12-21	1	-7/+7
*	Two sets of changes. Sorry they are intermingled.	Evan Cheng	2010-11-03	1	-4/+7
*	Avoiding overly aggressive latency scheduling. If the two nodes share an	Evan Cheng	2010-10-29	1	-0/+9
*	Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.	Evan Cheng	2010-10-28	1	-0/+3
*	Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ...	Evan Cheng	2010-10-28	1	-3/+0
*	Fix a major bug in operand latency computation. The use index must be adjusted	Evan Cheng	2010-10-28	1	-0/+3