| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Convert some VTBL and VTBX instructions to use pseudo instructions prior to | Bob Wilson | 2010-09-13 | 1 | -0/+8 |
| * | VFP/NEON load/store multiple instructions are addrmode4, not 5. | Jim Grosbach | 2010-09-08 | 1 | -4/+4 |
| * | - Cleanup some whitespaces. | Bill Wendling | 2010-08-31 | 1 | -102/+101 |
| * | Use the existing T2I_bin_s_irs pattern instead of creating T2I_bin_sw_irs, which | Bill Wendling | 2010-08-30 | 1 | -21/+0 |
| * | Create Thumb2sI_cpsr and T2sI_cpsr. These new classes indicate that CPSR is the | Bill Wendling | 2010-08-30 | 1 | -3/+24 |
| * | Start converting NEON load/stores to use pseudo instructions, beginning here | Bob Wilson | 2010-08-25 | 1 | -0/+8 |
| * | MC/ARM: Add an ARMOperand class for condition codes. | Daniel Dunbar | 2010-08-11 | 1 | -0/+6 |
| * | Add a separate ARM instruction format for Saturate instructions. | Bob Wilson | 2010-08-11 | 1 | -31/+32 |
| * | ARMv4 JIT forgets to set the lr register when making a indirect function call... | Xerxes Ranby | 2010-07-22 | 1 | -1/+1 |
| * | Renumber NEON instruction formats to be consecutive. | Bob Wilson | 2010-06-26 | 1 | -12/+12 |
| * | Rename ARM instruction formats NEONGetLnFrm, NEONSetLnFrm and NEONDupFrm to | Bob Wilson | 2010-06-25 | 1 | -18/+18 |
| * | Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats. | Bob Wilson | 2010-06-25 | 1 | -5/+1 |
| * | Clean up some extra whitespace. | Bob Wilson | 2010-05-24 | 1 | -12/+12 |
| * | Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. | Jakob Stoklund Olesen | 2010-04-05 | 1 | -14/+11 |
| * | Add NVTBLFrm to represent A8.6.406 VTBL, VTBX Vector Table Lookup Instructions. | Johnny Chen | 2010-03-29 | 1 | -0/+1 |
| * | Add a format argument to the N3V and N3VX classes, removing the N3Vf class. | Bob Wilson | 2010-03-27 | 1 | -13/+6 |
| * | Add NVMulSLFrm to represent "3-register multiply with scalar" operations and set | Johnny Chen | 2010-03-27 | 1 | -0/+1 |
| * | Add NVExtFrm to represent NEON Vector Extract Instructions, that uses Inst{11-8} | Johnny Chen | 2010-03-26 | 1 | -0/+1 |
| * | Add N3RegVShFrm to represent 3-Register Vector Shift Instructions, which do not | Johnny Chen | 2010-03-26 | 1 | -5/+13 |
| * | Add N3RegFrm to represent "NEON 3 vector register format" instructions. | Johnny Chen | 2010-03-26 | 1 | -2/+3 |
| * | Add N2RegVShLFrm and N2RegVShRFrm formats so that the disassembler can easily | Johnny Chen | 2010-03-26 | 1 | -0/+2 |
| * | Removed instruction class NI from ARMInstrFormats.td. | Johnny Chen | 2010-03-25 | 1 | -6/+0 |
| * | Add NVDupLnFrm and change NVDupLane class to use that format. | Johnny Chen | 2010-03-25 | 1 | -1/+2 |
| * | Add NVCVTFrm (NEON Convert with fractional bits immediate) and modify N2VImm to | Johnny Chen | 2010-03-25 | 1 | -5/+6 |
| * | Added a new instruction class NVDupLane to be inherited by VDUPLND and VDUPLNQ, | Johnny Chen | 2010-03-25 | 1 | -0/+13 |
| * | Make the use of the vmla and vmls VFP instructions controllable via cmd line. | Jim Grosbach | 2010-03-24 | 1 | -0/+14 |
| * | Reverted r99326 which added NVdVmVCVTFrm, and later renamed to NVCVTFrm. | Johnny Chen | 2010-03-24 | 1 | -1/+0 |
| * | Renamed NVdVmImmFrm and NVdVmVCVTFrm to the more proper N2RegFrm and NVCVTFrm, | Johnny Chen | 2010-03-24 | 1 | -6/+6 |
| * | Renamed NVdImmFrm to N1RegModImmFrm. | Johnny Chen | 2010-03-23 | 1 | -2/+2 |
| * | Fix typo in the comment for N3VX class. | Johnny Chen | 2010-03-23 | 1 | -1/+1 |
| * | Add New NEON Format NVdVmVCVTFrm. | Johnny Chen | 2010-03-23 | 1 | -0/+1 |
| * | Add New NEON Format NVdVmImmFrm. | Johnny Chen | 2010-03-23 | 1 | -11/+13 |
| * | Fix VLDMQ and VSTMQ instructions to use the correct encoding and address modes. | Bob Wilson | 2010-03-23 | 1 | -6/+0 |
| * | Fix bad indentation, 80-column violations, and trailing whitespace. | Bob Wilson | 2010-03-23 | 1 | -52/+60 |
| * | Add New NEON Format NVdImmFrm. | Johnny Chen | 2010-03-23 | 1 | -7/+8 |
| * | Add NLdStFrm Format. | Johnny Chen | 2010-03-20 | 1 | -6/+9 |
| * | Revert this change, since it was causing ARM performance regressions. | Bob Wilson | 2010-03-19 | 1 | -3/+0 |
| * | Renumber LdStExFrm from 28 to 11 and shift the existing format values to make | Johnny Chen | 2010-03-19 | 1 | -22/+22 |
| * | Update comment to refer to the right filename. | Bob Wilson | 2010-03-18 | 1 | -1/+1 |
| * | Get rid of target-specific fp <-> int nodes when still I'm here. | Anton Korobeynikov | 2010-03-18 | 1 | -0/+3 |
| * | fix some buggy ops concatentation | Chris Lattner | 2010-03-18 | 1 | -12/+12 |
| * | Revert 98745 with respect to the addition of NEONFrm subformats for disassembly. | Johnny Chen | 2010-03-17 | 1 | -43/+0 |
| * | Increase format field from 5 to 6 bits. ARMII::FormMask was increased to 0x3f | Bob Wilson | 2010-03-17 | 1 | -3/+3 |
| * | Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm | Johnny Chen | 2010-03-17 | 1 | -0/+43 |
| * | --- Reverse-merging r98637 into '.': | Bob Wilson | 2010-03-16 | 1 | -43/+0 |
| * | Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend | Johnny Chen | 2010-03-16 | 1 | -0/+43 |
| * | Attempt to appease the arm-linux buildbot by fixing the JIT encodings for new | Bob Wilson | 2010-03-13 | 1 | -8/+9 |
| * | Change ARM ld/st multiple instructions to have variant instructions for | Bob Wilson | 2010-03-13 | 1 | -10/+14 |
| * | Factored out the disassembly printing of CPS option, MSR mask, and Negative Zero | Johnny Chen | 2010-03-10 | 1 | -0/+17 |
| * | Added STRHT for disassembly only and fixed a bug in AI3sthpo class where the W | Johnny Chen | 2010-03-01 | 1 | -1/+1 |
