summaryrefslogtreecommitdiffstats
path: root/lib/Target/ARM/ARMInstrInfo.h
Commit message (Expand)AuthorAgeFilesLines
* Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen2010-06-021-1/+1
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-3/+0
* - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng2009-11-141-1/+2
* - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relativeEvan Cheng2009-11-061-4/+4
* Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,...Anton Korobeynikov2009-11-021-1/+0
* Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster...Evan Cheng2009-08-041-3/+0
* Move the getInlineAsmLength virtual method from TAI to TII, whereChris Lattner2009-08-021-0/+4
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-281-3/+0
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...David Goodwin2009-07-241-7/+0
* Fix frame index elimination to correctly handle thumb-2 addressing modes that...David Goodwin2009-07-231-0/+7
* Let callers decide the sub-register index on the def operand of rematerialize...Evan Cheng2009-07-161-1/+2
* Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...David Goodwin2009-07-081-234/+12
* Add a Thumb2 instruction flag to that indicates whether the instruction can b...Evan Cheng2009-07-081-9/+13
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...David Goodwin2009-07-021-21/+21
* Add a new addressing mode for NEON load/store instructions.Bob Wilson2009-07-011-9/+10
* A few more load instructions.Evan Cheng2009-06-301-14/+15
* Implement Thumb2 ldr.Evan Cheng2009-06-291-4/+8
* ARM refactoring. Step 2: split RegisterInfoAnton Korobeynikov2009-06-271-14/+13
* Split thumb-related stuff into separate classes.Anton Korobeynikov2009-06-261-54/+56
* Add support for ARM's Advanced SIMD (NEON) instruction set.Bob Wilson2009-06-221-0/+6
* Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nastyEvan Cheng2009-02-091-1/+2
* Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.Evan Cheng2009-02-061-4/+0
* Change TargetInstrInfo::isMoveInstr to return source and destination sub-regi...Evan Cheng2009-01-201-4/+5
* Split foldMemoryOperand into public non-virtual and protected virtualDan Gohman2008-12-031-9/+9
* Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman2008-11-181-2/+4
* Handle the rest of pseudo instructions.Evan Cheng2008-11-131-24/+24
* Fix pre- and post-indexed load / store encoding bugs.Evan Cheng2008-11-131-16/+18
* Fix address mode 3 immediate offset mode encoding.Evan Cheng2008-11-121-0/+2
* Consolidate formats; fix FCMPED etc. encodings.Evan Cheng2008-11-121-25/+22
* Fix VFP conversion instruction encodings.Evan Cheng2008-11-121-4/+6
* Fix FMDRR encoding.Evan Cheng2008-11-111-4/+5
* Encode VFP load / store instructions.Evan Cheng2008-11-111-22/+24
* Encode VFP conversion instructions.Evan Cheng2008-11-111-4/+4
* Encode VFP arithmetic instructions.Evan Cheng2008-11-111-4/+11
* Encode misc arithmetic instructions.Evan Cheng2008-11-071-0/+1
* Encode extend instructions; more clean up.Evan Cheng2008-11-061-14/+20
* - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.Evan Cheng2008-11-061-2/+2
* Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 enc...Evan Cheng2008-11-061-6/+2
* Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.Evan Cheng2008-11-061-18/+14
* Fix encoding of multiple instructions with 3 src operands; also handle smmul,...Evan Cheng2008-11-061-19/+18
* Restructure ARM code emitter to use instruction formats instead of addressing...Evan Cheng2008-11-051-37/+37
* Add binary encoding support for multiply instructions. Some blanks left to fi...Jim Grosbach2008-11-031-15/+17
* Const-ify several TargetInstrInfo methods.Dan Gohman2008-10-161-5/+5
* need ARM.h for ARMCC definitionJim Grosbach2008-10-071-0/+1
* Encode the conditional execution predicate when JITing.Jim Grosbach2008-10-071-0/+6
* Revert 56176. All those instruction formats are still needed.Evan Cheng2008-09-131-7/+23
* Eliminate unnecessary instruction formats.Evan Cheng2008-09-121-23/+7
* Rewrite address mode 1 code emission routines.Evan Cheng2008-09-121-0/+1
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ...Owen Anderson2008-08-261-1/+1
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change h...Owen Anderson2008-08-141-6/+7
generated by cgit v1.1 at 2025-01-21 22:02:49 +0000