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path: root/lib/Target/ARM/ARMInstrNEON.td
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* Add NVTBLFrm to represent A8.6.406 VTBL, VTBX Vector Table Lookup Instructions.Johnny Chen2010-03-291-8/+8
* fix integer negates to use the proper type for the zero vectors,Chris Lattner2010-03-281-11/+14
* fix vnot matching to explicitly specify the type of theChris Lattner2010-03-281-10/+16
* Fix indentation.Bob Wilson2010-03-271-34/+34
* Add a format argument to the N3V and N3VX classes, removing the N3Vf class.Bob Wilson2010-03-271-185/+192
* Add NVMulSLFrm to represent "3-register multiply with scalar" operations and setJohnny Chen2010-03-271-122/+129
* Remove the duplicate multiclass N3VSh_QHSD and use N3VInt_QHSD which is modifiedJohnny Chen2010-03-261-193/+154
* Add NVExtFrm to represent NEON Vector Extract Instructions, that uses Inst{11-8}Johnny Chen2010-03-261-10/+10
* Add N3RegVShFrm to represent 3-Register Vector Shift Instructions, which do notJohnny Chen2010-03-261-18/+72
* Add N2RegVShLFrm and N2RegVShRFrm formats so that the disassembler can easilyJohnny Chen2010-03-261-42/+52
* Add NVCVTFrm (NEON Convert with fractional bits immediate) and modify N2VImm toJohnny Chen2010-03-251-14/+14
* Added a new instruction class NVDupLane to be inherited by VDUPLND and VDUPLNQ,Johnny Chen2010-03-251-20/+18
* Trivial formating change.Johnny Chen2010-03-241-2/+2
* Reverted r99326 which added NVdVmVCVTFrm, and later renamed to NVCVTFrm.Johnny Chen2010-03-241-24/+9
* Reverted r99376. The disassembler will deal with the 2-reg format of these twoJohnny Chen2010-03-241-3/+0
* Mark VMOVDneon and VMOVQ as having the N2RegFrm form to help the disassembler.Johnny Chen2010-03-241-2/+5
* Renamed NVdVmImmFrm and NVdVmVCVTFrm to the more proper N2RegFrm and NVCVTFrm,Johnny Chen2010-03-241-5/+5
* Add comment.Johnny Chen2010-03-231-0/+1
* Add New NEON Format NVdVmVCVTFrm.Johnny Chen2010-03-231-9/+24
* Fix VLDMQ and VSTMQ instructions to use the correct encoding and address modes.Bob Wilson2010-03-231-22/+24
* Rename some instructions to match the corresponding NEON opcode.Bob Wilson2010-03-231-4/+4
* Change VST1 instructions for loading Q register values to operate on pairsBob Wilson2010-03-231-31/+33
* Change VLD1 instructions for loading Q register values to operate on pairsBob Wilson2010-03-231-33/+34
* Rename one more NEON instruction that I missed earlier.Bob Wilson2010-03-221-1/+1
* Regroup some instructions. No functional change.Bob Wilson2010-03-221-43/+43
* Rename some VLD1/VST1 instructions to match the implementation, i.e., theBob Wilson2010-03-221-8/+8
* Remove some redundant instruction classes.Bob Wilson2010-03-221-63/+16
* Refactor instruction encoding arguments for VLDnLN/VSTnLN classes toBob Wilson2010-03-221-96/+96
* Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")Bob Wilson2010-03-201-56/+56
* Add instruction variants for VST2, VST3, and VST4 "store-lane" operations withBob Wilson2010-03-201-0/+47
* Add variants of VST2, VST3 and VST4 with address register writeback, andBob Wilson2010-03-201-30/+80
* Add instructions for double-spaced VST3 and VST4 without address registerBob Wilson2010-03-201-27/+32
* Add VST1 instructions with address register writeback.Bob Wilson2010-03-201-1/+47
* Add instruction variants for VLD2, VLD3, and VLD4 "load-lane" operations withBob Wilson2010-03-201-0/+51
* Tidy some more comments and whitespace.Bob Wilson2010-03-201-35/+29
* Add variants of VLD2, VLD3 and VLD4 with address register writeback, andBob Wilson2010-03-201-32/+82
* Tidy some comments and whitespace for consistency.Bob Wilson2010-03-201-8/+7
* Rename some instructions for consistency and sanity: use "_UPD" suffix forBob Wilson2010-03-201-48/+48
* Add instructions for double-spaced VLD3 and VLD4 without address registerBob Wilson2010-03-201-25/+30
* Add VLD1 instructions with address register writeback.Bob Wilson2010-03-201-1/+48
* Revert this change, since it was causing ARM performance regressions.Bob Wilson2010-03-191-23/+4
* Get rid of target-specific fp <-> int nodes when still I'm here.Anton Korobeynikov2010-03-181-4/+23
* Refactor NEON ld/st instructions to hardcode class arguments that are constants.Bob Wilson2010-03-181-201/+193
* Revert 98745 with respect to the addition of NEONFrm subformats for disassembly.Johnny Chen2010-03-171-410/+85
* Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrmJohnny Chen2010-03-171-85/+410
* Revert 98683. It is breaking something in the disassembler.Bob Wilson2010-03-161-4/+4
* Remove redundant writeback flag from ARM address mode 6. Also remove theBob Wilson2010-03-161-4/+4
* --- Reverse-merging r98637 into '.':Bob Wilson2010-03-161-410/+85
* Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen2010-03-161-85/+410
* fix an ambiguous pattern, contrary to expectations, scalar_to_vectorChris Lattner2010-03-151-1/+1