| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add IsThumb1Only to most 16-bit thumb instructions since we want to isel 32-b... | Evan Cheng | 2009-06-23 | 1 | -53/+53 |
| * | Add explicit types for shift count constants. This is in preparation for | Bob Wilson | 2009-06-22 | 1 | -9/+9 |
| * | Mark a few Thumb instructions commutable; just happened to spot this | Eli Friedman | 2009-06-19 | 1 | -0/+5 |
| * | Mark some pattern-less instructions as neverHasSideEffects. | Evan Cheng | 2009-06-12 | 1 | -0/+3 |
| * | correct register class for tADDspi to GPR since the register will always be SP | Jim Grosbach | 2009-05-12 | 1 | -1/+1 |
| * | PR2985 / <rdar://problem/6584986> | Jim Grosbach | 2009-04-07 | 1 | -138/+146 |
| * | remove trailing whitespace | Jim Grosbach | 2009-03-27 | 1 | -8/+8 |
| * | Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. | Dan Gohman | 2008-12-03 | 1 | -5/+5 |
| * | Rename ConstantSDNode::getValue to getZExtValue, for consistency | Dan Gohman | 2008-09-12 | 1 | -11/+11 |
| * | More refactoring. | Evan Cheng | 2008-08-29 | 1 | -45/+0 |
| * | This commit changes: | Chris Lattner | 2008-01-17 | 1 | -4/+0 |
| * | get def use info more correct. | Chris Lattner | 2008-01-10 | 1 | -2/+3 |
| * | Only mark instructions that load a single value without extension as isSimple... | Evan Cheng | 2008-01-07 | 1 | -5/+6 |
| * | rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. | Chris Lattner | 2008-01-06 | 1 | -4/+4 |
| * | rename isStore -> mayStore to more accurately reflect what it captures. | Chris Lattner | 2008-01-06 | 1 | -2/+2 |
| * | remove explicit isStore flags that are now inferrable. | Chris Lattner | 2008-01-06 | 1 | -1/+1 |
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack | Bill Wendling | 2007-11-13 | 1 | -3/+3 |
| * | Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. | Evan Cheng | 2007-09-11 | 1 | -2/+4 |
| * | Initial JIT support for ARM by Raul Fernandes Herbster. | Evan Cheng | 2007-08-07 | 1 | -1/+1 |
| * | No more noResults. | Evan Cheng | 2007-07-21 | 1 | -3/+3 |
| * | Change instruction description to split OperandList into OutOperandList and | Evan Cheng | 2007-07-19 | 1 | -104/+107 |
| * | Remove clobbersPred. Add an OptionalDefOperand to instructions which have the... | Evan Cheng | 2007-07-10 | 1 | -1/+0 |
| * | No need for ccop anymore. | Evan Cheng | 2007-07-06 | 1 | -2/+2 |
| * | Each ARM use predicate operand is now made up of two components. The new comp... | Evan Cheng | 2007-07-05 | 1 | -2/+4 |
| * | Revert the earlier change that removed the M_REMATERIALIZABLE machine | Dan Gohman | 2007-06-26 | 1 | -0/+1 |
| * | Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad | Dan Gohman | 2007-06-19 | 1 | -1/+0 |
| * | Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. | Evan Cheng | 2007-06-19 | 1 | -0/+1 |
| * | tBcc is not a barrier. | Evan Cheng | 2007-06-08 | 1 | -1/+1 |
| * | Mark these instructions clobbersPred. They modify the condition code register. | Evan Cheng | 2007-06-06 | 1 | -0/+1 |
| * | ARM::tB is also predicable. | Evan Cheng | 2007-05-16 | 1 | -2/+5 |
| * | Add PredicateOperand to all ARM instructions that have the condition field. | Evan Cheng | 2007-05-15 | 1 | -1/+13 |
| * | Switch BCC, MOVCCr, etc. to PredicateOperand. | Evan Cheng | 2007-05-08 | 1 | -2/+2 |
| * | Doh. PC displacement is between the constantpool and the add instruction. | Evan Cheng | 2007-05-01 | 1 | -1/+1 |
| * | ARM TLS: implement "general dynamic", "initial exec" and "local exec" models. | Lauro Ramos Venancio | 2007-04-27 | 1 | -0/+12 |
| * | Back out previous check-in. Incorrect. | Evan Cheng | 2007-04-27 | 1 | -6/+2 |
| * | tLEApcrel is a AddrModeTs, i.e. pc relative. | Evan Cheng | 2007-04-27 | 1 | -2/+6 |
| * | - Divides the comparisons in two types: comparisons that only use N and Z | Lauro Ramos Venancio | 2007-04-02 | 1 | -2/+17 |
| * | Can't re-materialize mov r, imm in thumb since mov would clobber the conditio... | Evan Cheng | 2007-03-29 | 1 | -1/+1 |
| * | bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" o... | Lauro Ramos Venancio | 2007-03-27 | 1 | -5/+3 |
| * | bugfix: When the source register of CALL_NOLINK was LR, the following code wa... | Lauro Ramos Venancio | 2007-03-20 | 1 | -3/+5 |
| * | Fix naming inconsistencies. | Evan Cheng | 2007-03-19 | 1 | -4/+4 |
| * | Special LDR instructions to load from non-pc-relative constantpools. These are | Evan Cheng | 2007-03-19 | 1 | -0/+5 |
| * | Constant generation instructions are re-materializable. | Evan Cheng | 2007-03-19 | 1 | -0/+1 |
| * | Spill / restore should avoid modifying the condition register. | Evan Cheng | 2007-02-07 | 1 | -0/+10 |
| * | .set pc relative displacement bug: label should be moved down one instruction | Evan Cheng | 2007-02-01 | 1 | -6/+6 |
| * | Special epilogue for vararg functions. We cannot do a pop to pc because | Evan Cheng | 2007-02-01 | 1 | -1/+4 |
| * | Thumb asm syntax does not want 's' suffix for flag setting opcodes. | Evan Cheng | 2007-01-31 | 1 | -2/+2 |
| * | - Fix codegen for pc relative constant (e.g. JT) in thumb mode: | Evan Cheng | 2007-01-30 | 1 | -16/+5 |
| * | Change the operand orders to t_addrmode_s* to make it easier to morph | Evan Cheng | 2007-01-30 | 1 | -3/+3 |
