| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | For each instruction itinerary class, specify the number of micro-ops each | Evan Cheng | 2010-09-09 | 1 | -3/+4 |
| * | grammar tweak | Jim Grosbach | 2010-09-07 | 1 | -1/+1 |
| * | Make ARM add rN, sp, #imm instructions rematerializable. That's how the addre... | Jim Grosbach | 2010-08-30 | 1 | -0/+4 |
| * | Delete some unused instructions. | Evan Cheng | 2010-08-10 | 1 | -13/+0 |
| * | Move newlines before inline jumptables from the asm strings in .td files to | Bob Wilson | 2010-07-31 | 1 | -1/+1 |
| * | LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want it | Jim Grosbach | 2010-06-21 | 1 | -1/+1 |
| * | Clean up 80 column violations. No functional change. | Jim Grosbach | 2010-06-02 | 1 | -1/+2 |
| * | Cosmetic cleanup. No functional change. | Jim Grosbach | 2010-05-28 | 1 | -6/+6 |
| * | make sure accesses to set up the jmpbuf don't get moved after it by the sched... | Jim Grosbach | 2010-05-28 | 1 | -1/+2 |
| * | Update the saved stack pointer in the sjlj function context following either | Jim Grosbach | 2010-05-27 | 1 | -3/+2 |
| * | fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence. | Jim Grosbach | 2010-05-26 | 1 | -1/+1 |
| * | Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit. | Jim Grosbach | 2010-05-22 | 1 | -0/+16 |
| * | t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoi... | Evan Cheng | 2010-05-19 | 1 | -0/+1 |
| * | Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ... | Evan Cheng | 2010-05-19 | 1 | -6/+7 |
| * | Mark a few more pattern-less instructions with neverHasSideEffects. This is e... | Evan Cheng | 2010-05-19 | 1 | -0/+4 |
| * | Fix a regression in 464.h264 for thumb1 and thumb2 nightly tests. | Bob Wilson | 2010-05-17 | 1 | -1/+1 |
| * | Chris said that the comment char should be escaped. Fix all the occurences of... | Anton Korobeynikov | 2010-05-16 | 1 | -11/+11 |
| * | "trap" pseudo-op turned out to be apple-local. | Anton Korobeynikov | 2010-05-15 | 1 | -1/+4 |
| * | Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction. | Evan Cheng | 2010-05-11 | 1 | -2/+3 |
| * | set SDNPVariadic on nodes throughout the rest of the targets that | Chris Lattner | 2010-03-19 | 1 | -1/+2 |
| * | Remove the writeback flag from ARM's address mode 4. Now that we have separate | Bob Wilson | 2010-03-16 | 1 | -2/+2 |
| * | Change ARM ld/st multiple instructions to have variant instructions for | Bob Wilson | 2010-03-13 | 1 | -13/+22 |
| * | Factored out the disassembly printing of CPS option, MSR mask, and Negative Zero | Johnny Chen | 2010-03-10 | 1 | -1/+1 |
| * | Modified the asm string of 16-bit Thumb MUL instruction so that it prints: | Johnny Chen | 2010-03-03 | 1 | -1/+1 |
| * | Added 32-bit Thumb instructions: CPS, SDIV, UDIV, SXTB16, SXTAB16, UXTAB16, SEL, | Johnny Chen | 2010-03-02 | 1 | -0/+13 |
| * | The mayHaveSideEffects flag is no longer used. | Dan Gohman | 2010-02-27 | 1 | -4/+3 |
| * | Added the following 16-bit Thumb instructions for disassembly only: YIELD, WFE, | Johnny Chen | 2010-02-25 | 1 | -0/+42 |
| * | Added tNOP for disassembly only. | Johnny Chen | 2010-02-25 | 1 | -1/+8 |
| * | Added tSVC and tTRAP for disassembly only. | Johnny Chen | 2010-02-25 | 1 | -0/+18 |
| * | Updated version of r96634 (which was reverted due to failing 176.gcc and | Jim Grosbach | 2010-02-22 | 1 | -1/+4 |
| * | 80 column cleanup | Jim Grosbach | 2010-02-16 | 1 | -2/+2 |
| * | Remove trailing whitespace | Jim Grosbach | 2010-02-16 | 1 | -12/+12 |
| * | Added BKPT/tBKPT (breakpoint) to the instruction table for disassembly purpose. | Johnny Chen | 2010-02-11 | 1 | -0/+8 |
| * | Radar 7417921 | Jim Grosbach | 2010-02-09 | 1 | -1/+1 |
| * | tighten up eh.setjmp sequence a bit. | Jim Grosbach | 2010-02-08 | 1 | -9/+7 |
| * | Adjust setjmp instruction sequence to not need 32-bit alignment padding | Jim Grosbach | 2010-01-27 | 1 | -4/+3 |
| * | Fix PR5694. The CMN instructions set the flags differently from CMP, so they | Jim Grosbach | 2010-01-22 | 1 | -4/+6 |
| * | The most significant encoding bit of GPR:$src or GPR:$dst was over-specified in | Johnny Chen | 2010-01-18 | 1 | -5/+5 |
| * | Added 16-bit Thumb Load/Store immediate instructions with encoding bits so that | Johnny Chen | 2010-01-14 | 1 | -0/+24 |
| * | Fixed a couple of places for Thumb MOV where encoding bits are underspecified. | Johnny Chen | 2010-01-13 | 1 | -4/+3 |
| * | Remove the JustSP single-register regclass. | Jakob Stoklund Olesen | 2010-01-13 | 1 | -1/+1 |
| * | Add a SPR register class to the ARM target. | Jakob Stoklund Olesen | 2009-12-22 | 1 | -1/+1 |
| * | Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings. | Johnny Chen | 2009-12-16 | 1 | -1/+1 |
| * | Add encoding bits for some Thumb instructions. Plus explicitly set the top two | Johnny Chen | 2009-12-16 | 1 | -2/+6 |
| * | Added encoding bits for the Thumb ISA. Initial checkin. | Johnny Chen | 2009-12-15 | 1 | -103/+207 |
| * | Thumb1 exception handling setjmp | Jim Grosbach | 2009-12-01 | 1 | -0/+29 |
| * | Remat VLDRD from constpool. Clean up some instruction property specifications. | Evan Cheng | 2009-11-20 | 1 | -3/+4 |
| * | More consistent thumb1 asm printing. | Evan Cheng | 2009-11-19 | 1 | -10/+15 |
| * | - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative | Evan Cheng | 2009-11-06 | 1 | -0/+10 |
| * | The .n suffix must go after the predicate. | Evan Cheng | 2009-11-04 | 1 | -1/+1 |
