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path: root/lib/Target/ARM/ARMInstrThumb2.td
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* Fix LDM_RET schedule itinery.Evan Cheng2010-09-081-1/+2
* remove some dead code. t2addrmode_imm8s4 is never used in a Chris Lattner2010-09-051-2/+1
* temporarily revert r112664, it is causing a decoding conflict, and Chris Lattner2010-09-011-12/+0
* We have a chance for an optimization. Consider this code:Bill Wendling2010-08-311-0/+12
* Use the existing T2I_bin_s_irs pattern instead of creating T2I_bin_sw_irs, whichBill Wendling2010-08-301-48/+2
* Make ARM add rN, sp, #imm instructions rematerializable. That's how the addre...Jim Grosbach2010-08-301-0/+4
* Create Thumb2sI_cpsr and T2sI_cpsr. These new classes indicate that CPSR is theBill Wendling2010-08-301-8/+47
* - Add a parameter to T2I_bin_irs for those patterns which set the S bit.Bill Wendling2010-08-291-8/+14
* Name ANDflag to ANDS, which is less stupid.Bill Wendling2010-08-291-2/+2
* Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, butBill Wendling2010-08-291-0/+4
* Restrict the register to tGPR to make sure the str instruction will beJim Grosbach2010-08-261-4/+4
* Revert r112176; it broke test/CodeGen/Thumb2/thumb2-cmn.ll.Dan Gohman2010-08-261-50/+8
* There seems to be a (potential) hardware bug with the CMN instruction andBill Wendling2010-08-261-8/+50
* Add the "isCompare" attribute to the defm instead of each individual instr.Bill Wendling2010-08-191-3/+1
* Don't call tablegen'ed Predicate_* functions in the ARM target.Jakob Stoklund Olesen2010-08-171-4/+1
* 80 column cleanup.Jim Grosbach2010-08-171-27/+32
* Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson2010-08-171-12/+12
* Generalize a pattern for PKHTB: an SRL of 16-31 bits will guaranteeBob Wilson2010-08-161-2/+4
* Rename sat_shift operand to shift_imm, in preparation for using it for otherBob Wilson2010-08-161-2/+2
* T2I_rbin_irs rr variant is for disassembly only, so don't provide a pattern.Bob Wilson2010-08-141-1/+1
* Add a Thumb2 t2RSBrr instruction for disassembly only.Bob Wilson2010-08-131-5/+18
* Move the Thumb2 SSAT and USAT optional shift operator out of theBob Wilson2010-08-131-30/+8
* Really control isel of barrier instructions with cpu feature.Evan Cheng2010-08-111-2/+2
* - Add subtarget feature -mattr=+db which determine whether an ARM cpu has theEvan Cheng2010-08-111-10/+4
* ARM: Quote $p in an asm string.Daniel Dunbar2010-08-111-2/+2
* CBZ and CBNZ are implemented.Evan Cheng2010-08-101-5/+0
* Delete some unused instructions.Evan Cheng2010-08-101-14/+0
* Use the "isCompare" machine instruction attribute instead of calling theBill Wendling2010-08-081-1/+2
* Move newlines before inline jumptables from the asm strings in .td files toBob Wilson2010-07-311-3/+3
* Many Thumb2 instructions can reference the full ARM register set (i.e.,Jim Grosbach2010-07-301-284/+293
* Add builtins for ssat/usat, similar to RealView's __ssat and __usat intrinsics.Nate Begeman2010-07-291-0/+3
* Add intrinsics __builtin_arm_qadd & __builtin_arm_qsub to allow access to the...Nate Begeman2010-07-291-4/+7
* Remove incorrect substitution pattern for UXTB16. It wrongly assumed the inpu...Jim Grosbach2010-07-281-2/+6
* Using BIC for immediates needs an extra bump for its complexity to getJim Grosbach2010-07-201-0/+1
* Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instructionJim Grosbach2010-07-161-4/+6
* Improve 64-subtraction of immediates when parts of the immediate can fitJim Grosbach2010-07-141-6/+29
* Add missing address register update to t2LDM_RET instruction.Bob Wilson2010-07-141-1/+1
* PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas.Evan Cheng2010-06-291-2/+2
* Always allow Thumb-2 SXTB, SXTH, UXTB, and UXTH. Fixes PR7324.Eli Friedman2010-06-241-11/+9
* LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want itJim Grosbach2010-06-211-1/+1
* Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng2010-06-181-0/+1
* Clean up 80 column violations. No functional change.Jim Grosbach2010-06-021-1/+2
* Cosmetic cleanup. No functional change.Jim Grosbach2010-05-281-12/+12
* make sure accesses to set up the jmpbuf don't get moved after it by the sched...Jim Grosbach2010-05-281-2/+3
* Update the saved stack pointer in the sjlj function context following eitherJim Grosbach2010-05-271-5/+3
* fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence.Jim Grosbach2010-05-261-2/+2
* Allow t2MOVsrl_flag and t2MOVsra_flag instructions to be predicated.Bob Wilson2010-05-251-6/+6
* Fix up instruction classes for Thumb2 RSB instructions to be consistent withBob Wilson2010-05-251-15/+15
* Allow Thumb2 MVN instructions to set condition codes. The immediate operandBob Wilson2010-05-241-5/+5
* Thumb2 RSBS instructions were being printed without the 'S' suffix.Bob Wilson2010-05-241-6/+4