| Commit message (Expand) | Author | Age | Files | Lines |
* | Fix LDM_RET schedule itinery. | Evan Cheng | 2010-09-08 | 1 | -1/+2 |
* | remove some dead code. t2addrmode_imm8s4 is never used in a | Chris Lattner | 2010-09-05 | 1 | -2/+1 |
* | temporarily revert r112664, it is causing a decoding conflict, and | Chris Lattner | 2010-09-01 | 1 | -12/+0 |
* | We have a chance for an optimization. Consider this code: | Bill Wendling | 2010-08-31 | 1 | -0/+12 |
* | Use the existing T2I_bin_s_irs pattern instead of creating T2I_bin_sw_irs, which | Bill Wendling | 2010-08-30 | 1 | -48/+2 |
* | Make ARM add rN, sp, #imm instructions rematerializable. That's how the addre... | Jim Grosbach | 2010-08-30 | 1 | -0/+4 |
* | Create Thumb2sI_cpsr and T2sI_cpsr. These new classes indicate that CPSR is the | Bill Wendling | 2010-08-30 | 1 | -8/+47 |
* | - Add a parameter to T2I_bin_irs for those patterns which set the S bit. | Bill Wendling | 2010-08-29 | 1 | -8/+14 |
* | Name ANDflag to ANDS, which is less stupid. | Bill Wendling | 2010-08-29 | 1 | -2/+2 |
* | Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, but | Bill Wendling | 2010-08-29 | 1 | -0/+4 |
* | Restrict the register to tGPR to make sure the str instruction will be | Jim Grosbach | 2010-08-26 | 1 | -4/+4 |
* | Revert r112176; it broke test/CodeGen/Thumb2/thumb2-cmn.ll. | Dan Gohman | 2010-08-26 | 1 | -50/+8 |
* | There seems to be a (potential) hardware bug with the CMN instruction and | Bill Wendling | 2010-08-26 | 1 | -8/+50 |
* | Add the "isCompare" attribute to the defm instead of each individual instr. | Bill Wendling | 2010-08-19 | 1 | -3/+1 |
* | Don't call tablegen'ed Predicate_* functions in the ARM target. | Jakob Stoklund Olesen | 2010-08-17 | 1 | -4/+1 |
* | 80 column cleanup. | Jim Grosbach | 2010-08-17 | 1 | -27/+32 |
* | Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid | Bob Wilson | 2010-08-17 | 1 | -12/+12 |
* | Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee | Bob Wilson | 2010-08-16 | 1 | -2/+4 |
* | Rename sat_shift operand to shift_imm, in preparation for using it for other | Bob Wilson | 2010-08-16 | 1 | -2/+2 |
* | T2I_rbin_irs rr variant is for disassembly only, so don't provide a pattern. | Bob Wilson | 2010-08-14 | 1 | -1/+1 |
* | Add a Thumb2 t2RSBrr instruction for disassembly only. | Bob Wilson | 2010-08-13 | 1 | -5/+18 |
* | Move the Thumb2 SSAT and USAT optional shift operator out of the | Bob Wilson | 2010-08-13 | 1 | -30/+8 |
* | Really control isel of barrier instructions with cpu feature. | Evan Cheng | 2010-08-11 | 1 | -2/+2 |
* | - Add subtarget feature -mattr=+db which determine whether an ARM cpu has the | Evan Cheng | 2010-08-11 | 1 | -10/+4 |
* | ARM: Quote $p in an asm string. | Daniel Dunbar | 2010-08-11 | 1 | -2/+2 |
* | CBZ and CBNZ are implemented. | Evan Cheng | 2010-08-10 | 1 | -5/+0 |
* | Delete some unused instructions. | Evan Cheng | 2010-08-10 | 1 | -14/+0 |
* | Use the "isCompare" machine instruction attribute instead of calling the | Bill Wendling | 2010-08-08 | 1 | -1/+2 |
* | Move newlines before inline jumptables from the asm strings in .td files to | Bob Wilson | 2010-07-31 | 1 | -3/+3 |
* | Many Thumb2 instructions can reference the full ARM register set (i.e., | Jim Grosbach | 2010-07-30 | 1 | -284/+293 |
* | Add builtins for ssat/usat, similar to RealView's __ssat and __usat intrinsics. | Nate Begeman | 2010-07-29 | 1 | -0/+3 |
* | Add intrinsics __builtin_arm_qadd & __builtin_arm_qsub to allow access to the... | Nate Begeman | 2010-07-29 | 1 | -4/+7 |
* | Remove incorrect substitution pattern for UXTB16. It wrongly assumed the inpu... | Jim Grosbach | 2010-07-28 | 1 | -2/+6 |
* | Using BIC for immediates needs an extra bump for its complexity to get | Jim Grosbach | 2010-07-20 | 1 | -0/+1 |
* | Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instruction | Jim Grosbach | 2010-07-16 | 1 | -4/+6 |
* | Improve 64-subtraction of immediates when parts of the immediate can fit | Jim Grosbach | 2010-07-14 | 1 | -6/+29 |
* | Add missing address register update to t2LDM_RET instruction. | Bob Wilson | 2010-07-14 | 1 | -1/+1 |
* | PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas. | Evan Cheng | 2010-06-29 | 1 | -2/+2 |
* | Always allow Thumb-2 SXTB, SXTH, UXTB, and UXTH. Fixes PR7324. | Eli Friedman | 2010-06-24 | 1 | -11/+9 |
* | LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want it | Jim Grosbach | 2010-06-21 | 1 | -1/+1 |
* | Allow ARM if-converter to be run after post allocation scheduling. | Evan Cheng | 2010-06-18 | 1 | -0/+1 |
* | Clean up 80 column violations. No functional change. | Jim Grosbach | 2010-06-02 | 1 | -1/+2 |
* | Cosmetic cleanup. No functional change. | Jim Grosbach | 2010-05-28 | 1 | -12/+12 |
* | make sure accesses to set up the jmpbuf don't get moved after it by the sched... | Jim Grosbach | 2010-05-28 | 1 | -2/+3 |
* | Update the saved stack pointer in the sjlj function context following either | Jim Grosbach | 2010-05-27 | 1 | -5/+3 |
* | fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence. | Jim Grosbach | 2010-05-26 | 1 | -2/+2 |
* | Allow t2MOVsrl_flag and t2MOVsra_flag instructions to be predicated. | Bob Wilson | 2010-05-25 | 1 | -6/+6 |
* | Fix up instruction classes for Thumb2 RSB instructions to be consistent with | Bob Wilson | 2010-05-25 | 1 | -15/+15 |
* | Allow Thumb2 MVN instructions to set condition codes. The immediate operand | Bob Wilson | 2010-05-24 | 1 | -5/+5 |
* | Thumb2 RSBS instructions were being printed without the 'S' suffix. | Bob Wilson | 2010-05-24 | 1 | -6/+4 |