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ARM
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ARMSchedule.td
Commit message (
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Author
Age
Files
Lines
*
For each instruction itinerary class, specify the number of micro-ops each
Evan Cheng
2010-09-09
1
-5
/
+5
*
Fix LDM_RET schedule itinery.
Evan Cheng
2010-09-08
1
-0
/
+1
*
Make processor FUs unique for given itinerary. This extends the limit of 32
Anton Korobeynikov
2010-04-18
1
-15
/
+1
*
Split A8/A9 itins - they already were too big.
Anton Korobeynikov
2010-04-07
1
-1
/
+2
*
Fix itins for VABA
Anton Korobeynikov
2010-04-07
1
-0
/
+2
*
VHADD differs from VHSUB at least on A9 - the former reads both operands in t...
Anton Korobeynikov
2010-04-07
1
-0
/
+2
*
Define new itin classes for ARM <-> VFP reg moves to distinguish from NEON op...
Anton Korobeynikov
2010-04-07
1
-0
/
+4
*
Add new itin classes for FP16 <-> FP32 conversions and make uise of them for A9.
Anton Korobeynikov
2010-04-07
1
-0
/
+2
*
Make use of new reserved/required scheduling stuff: introduce VFP and NEON lo...
Anton Korobeynikov
2010-04-07
1
-0
/
+2
*
Finish scheduling itineraries for NEON.
David Goodwin
2009-09-25
1
-4
/
+30
*
Make the end-of-itinerary mark explicit. Some cleanup.
David Goodwin
2009-09-24
1
-84
/
+1
*
Checkpoint NEON scheduling itineraries.
David Goodwin
2009-09-23
1
-1
/
+31
*
Add Cortex-A8 VFP model.
David Goodwin
2009-09-21
1
-10
/
+68
*
Update Cortex-A8 instruction itineraries for integer instructions.
David Goodwin
2009-08-19
1
-17
/
+91
*
Turn on if-conversion for thumb2.
Evan Cheng
2009-08-15
1
-2
/
+4
*
Finalize itineraries for cortex-a8 integer multiply
David Goodwin
2009-08-13
1
-2
/
+6
*
Allow a zero cycle stage to reserve/require a FU without advancing the cycle ...
David Goodwin
2009-08-11
1
-5
/
+10
*
Checkpoint scheduling itinerary changes.
David Goodwin
2009-08-10
1
-6
/
+14
*
Add fake v7 itineraries for now.
Evan Cheng
2009-07-21
1
-0
/
+1
*
Latency information for ARM v6. It's rough and not yet hooked up. Right now ...
Evan Cheng
2009-06-19
1
-0
/
+35