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ARM
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ARMScheduleV6.td
Commit message (
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Author
Age
Files
Lines
*
For each instruction itinerary class, specify the number of micro-ops each
Evan Cheng
2010-09-09
1
-0
/
+5
*
Clean up 80 column violations. No functional change.
Jim Grosbach
2010-06-02
1
-1
/
+1
*
Make processor FUs unique for given itinerary. This extends the limit of 32
Anton Korobeynikov
2010-04-18
1
-69
/
+73
*
Add ARMv6 itineraries.
David Goodwin
2009-11-18
1
-1
/
+187
*
Checkpoint NEON scheduling itineraries.
David Goodwin
2009-09-23
1
-86
/
+1
*
Add Cortex-A8 VFP model.
David Goodwin
2009-09-21
1
-6
/
+35
*
Update Cortex-A8 instruction itineraries for integer instructions.
David Goodwin
2009-08-19
1
-6
/
+46
*
Turn on if-conversion for thumb2.
Evan Cheng
2009-08-15
1
-2
/
+4
*
Finalize itineraries for cortex-a8 integer multiply
David Goodwin
2009-08-13
1
-1
/
+3
*
Allow a zero cycle stage to reserve/require a FU without advancing the cycle ...
David Goodwin
2009-08-11
1
-9
/
+7
*
Checkpoint scheduling itinerary changes.
David Goodwin
2009-08-10
1
-7
/
+13
*
Fix comment.
Evan Cheng
2009-07-21
1
-1
/
+1
*
Latency information for ARM v6. It's rough and not yet hooked up. Right now ...
Evan Cheng
2009-06-19
1
-0
/
+22