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path: root/lib/Target/ARM/ARMScheduleV6.td
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* For each instruction itinerary class, specify the number of micro-ops eachEvan Cheng2010-09-091-0/+5
* Clean up 80 column violations. No functional change.Jim Grosbach2010-06-021-1/+1
* Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov2010-04-181-69/+73
* Add ARMv6 itineraries.David Goodwin2009-11-181-1/+187
* Checkpoint NEON scheduling itineraries.David Goodwin2009-09-231-86/+1
* Add Cortex-A8 VFP model.David Goodwin2009-09-211-6/+35
* Update Cortex-A8 instruction itineraries for integer instructions.David Goodwin2009-08-191-6/+46
* Turn on if-conversion for thumb2.Evan Cheng2009-08-151-2/+4
* Finalize itineraries for cortex-a8 integer multiplyDavid Goodwin2009-08-131-1/+3
* Allow a zero cycle stage to reserve/require a FU without advancing the cycle ...David Goodwin2009-08-111-9/+7
* Checkpoint scheduling itinerary changes.David Goodwin2009-08-101-7/+13
* Fix comment.Evan Cheng2009-07-211-1/+1
* Latency information for ARM v6. It's rough and not yet hooked up. Right now ...Evan Cheng2009-06-191-0/+22