| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 2010-09-10 | 1 | -1/+1 |
| * | Many Thumb2 instructions can reference the full ARM register set (i.e., | Jim Grosbach | 2010-07-30 | 1 | -4/+4 |
| * | Replace copyRegToReg with copyPhysReg for ARM. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -27/+19 |
| * | The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to add | Bob Wilson | 2010-06-29 | 1 | -2/+2 |
| * | Change if-cvt options to something that actually as useable. | Evan Cheng | 2010-06-29 | 1 | -4/+6 |
| * | Change if-conversion block size limit checks to add some flexibility. | Evan Cheng | 2010-06-25 | 1 | -0/+23 |
| * | Tail merging pass shall not break up IT blocks. rdar://8115404 | Evan Cheng | 2010-06-22 | 1 | -0/+16 |
| * | Allow ARM if-converter to be run after post allocation scheduling. | Evan Cheng | 2010-06-18 | 1 | -1/+58 |
| * | Next round of tail call changes. Register used in a tail | Dale Johannesen | 2010-06-15 | 1 | -5/+7 |
| * | Allow target to place 2-address pass inserted copies in better spots. Thumb2 ... | Evan Cheng | 2010-06-09 | 1 | -0/+43 |
| * | Clean up 80 column violations. No functional change. | Jim Grosbach | 2010-06-02 | 1 | -1/+2 |
| * | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman | 2010-05-06 | 1 | -5/+3 |
| * | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng | 2010-05-06 | 1 | -10/+12 |
| * | Handle register-to-register copies within the tGPR class. | Bob Wilson | 2010-04-26 | 1 | -12/+16 |
| * | use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() | Chris Lattner | 2010-04-02 | 1 | -3/+3 |
| * | Thumb2 storeFrom/LoadToStackSlot() need to handle tGPR regs directly, not pass | Jim Grosbach | 2010-03-27 | 1 | -2/+2 |
| * | Fix a crash compiling 254.gap for Thumb2. The Thumb2 add/sub with 12-bit | Bob Wilson | 2010-03-08 | 1 | -5/+23 |
| * | Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex. | Bob Wilson | 2010-02-06 | 1 | -11/+10 |
| * | Remove predicates when changing an add into an unpredicable mov. | Jakob Stoklund Olesen | 2010-01-19 | 1 | -3/+7 |
| * | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman | 2009-12-05 | 1 | -24/+0 |
| * | Refactor code. | Evan Cheng | 2009-11-08 | 1 | -53/+0 |
| * | 80-column cleanup of file header comments | Jim Grosbach | 2009-11-07 | 1 | -1/+1 |
| * | t2ldrpci_pic can be used for blockaddress as well. | Evan Cheng | 2009-11-07 | 1 | -3/+14 |
| * | Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRp... | Evan Cheng | 2009-11-07 | 1 | -26/+0 |
| * | - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical | Evan Cheng | 2009-11-07 | 1 | -0/+26 |
| * | - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative | Evan Cheng | 2009-11-06 | 1 | -1/+43 |
| * | Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,... | Anton Korobeynikov | 2009-11-02 | 1 | -1/+2 |
| * | Fix a couple more places where we are creating ld / st instructions without m... | Evan Cheng | 2009-11-01 | 1 | -2/+18 |
| * | Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the | Bob Wilson | 2009-10-28 | 1 | -0/+1 |
| * | Handle AddrMode4 for Thumb2 in rewriteT2FrameIndex. This occurs for | Bob Wilson | 2009-09-15 | 1 | -0/+5 |
| * | Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which can... | Evan Cheng | 2009-08-27 | 1 | -14/+22 |
| * | Whitespace cleanup. Remove trailing whitespace. | Jim Grosbach | 2009-08-11 | 1 | -4/+4 |
| * | Always use the 16-bit tMOVgpr2gpr instead of the 32-bit t2MOVr. | Evan Cheng | 2009-08-10 | 1 | -2/+1 |
| * | Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode. | Evan Cheng | 2009-08-07 | 1 | -6/+1 |
| * | It turns out most of the thumb2 instructions are not allowed to touch SP. The... | Evan Cheng | 2009-08-07 | 1 | -28/+70 |
| * | Use the i12 variant of load / store opcodes if offset is zero. Now we pass al... | Evan Cheng | 2009-08-03 | 1 | -1/+5 |
| * | Move the getInlineAsmLength virtual method from TAI to TII, where | Chris Lattner | 2009-08-02 | 1 | -2/+1 |
| * | Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte /... | Evan Cheng | 2009-07-29 | 1 | -0/+2 |
| * | Thumb-2: fix typo that caused incorrect stack elimination for VFP operations ... | David Goodwin | 2009-07-28 | 1 | -1/+1 |
| * | - More refactoring. This gets rid of all of the getOpcode calls. | Evan Cheng | 2009-07-28 | 1 | -12/+317 |
| * | More DCE. | Evan Cheng | 2009-07-27 | 1 | -4/+0 |
| * | Get rid of more dead code. | Evan Cheng | 2009-07-27 | 1 | -2/+0 |
| * | Get rid of some more getOpcode calls. | Evan Cheng | 2009-07-27 | 1 | -3/+0 |
| * | Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m... | Evan Cheng | 2009-07-27 | 1 | -2/+33 |
| * | Use the right instructions to copy between GPR and the more strictive tGPR cl... | Evan Cheng | 2009-07-27 | 1 | -4/+11 |
| * | Get rid of a couple of unnecessary getOpcode calls. | Evan Cheng | 2009-07-25 | 1 | -1/+1 |
| * | Change Thumb2 jumptable codegen to one that uses two level jumps: | Evan Cheng | 2009-07-25 | 1 | -6/+1 |
| * | Clean up. | Evan Cheng | 2009-07-24 | 1 | -3/+1 |
| * | FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi... | Evan Cheng | 2009-07-24 | 1 | -8/+0 |
| * | Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio... | David Goodwin | 2009-07-24 | 1 | -25/+4 |
