| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | disable for the moment while tracking down a few Thumb2-O0 failure that look | Jim Grosbach | 2010-09-08 | 1 | -1/+1 |
| * | woops. need to update a test along with this. | Jim Grosbach | 2010-09-08 | 1 | -1/+1 |
| * | disable temporarily while sorting out a few test failures in Thumb2-O0 tests. | Jim Grosbach | 2010-09-08 | 1 | -1/+1 |
| * | correct spill code to properly determine if dynamic stack realignment is | Jim Grosbach | 2010-09-08 | 1 | -2/+2 |
| * | VFP/NEON load/store multiple instructions are addrmode4, not 5. | Jim Grosbach | 2010-09-08 | 3 | -14/+14 |
| * | To shrink a t2LDM instruction to the 16-bit wide tLDM instruction, the base | Jim Grosbach | 2010-09-07 | 1 | -0/+12 |
| * | grammar tweak | Jim Grosbach | 2010-09-07 | 1 | -1/+1 |
| * | hopefully fix a problem building on cygwin-1.5 | Chris Lattner | 2010-09-07 | 1 | -2/+2 |
| * | in the case where an instruction only has one implementation | Chris Lattner | 2010-09-06 | 1 | -1/+2 |
| * | change MatchInstructionImpl to return an enum instead of bool. | Chris Lattner | 2010-09-06 | 1 | -1/+1 |
| * | have AsmMatcherEmitter.cpp produce the hunk of code that gets included | Chris Lattner | 2010-09-06 | 1 | -5/+4 |
| * | remove some dead code. t2addrmode_imm8s4 is never used in a | Chris Lattner | 2010-09-05 | 2 | -32/+1 |
| * | cleanups. | Chris Lattner | 2010-09-05 | 1 | -22/+17 |
| * | zap dead code. | Chris Lattner | 2010-09-04 | 1 | -4/+0 |
| * | Re-apply r112883: | Jim Grosbach | 2010-09-03 | 3 | -26/+95 |
| * | Check the local frame alignment for determining whether dynamic stack | Jim Grosbach | 2010-09-03 | 1 | -1/+1 |
| * | Finish converting the rest of the NEON VLD instructions to use pseudo- | Bob Wilson | 2010-09-03 | 4 | -154/+149 |
| * | Revert "For ARM stack frames that utilize variable sized objects and have eit... | Daniel Dunbar | 2010-09-03 | 3 | -95/+26 |
| * | Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the | Bob Wilson | 2010-09-03 | 2 | -33/+111 |
| * | Simple branch instruction support. | Eric Christopher | 2010-09-03 | 1 | -0/+23 |
| * | Add basic support for materializing constants (including fp) and | Eric Christopher | 2010-09-02 | 1 | -3/+40 |
| * | For ARM stack frames that utilize variable sized objects and have either | Jim Grosbach | 2010-09-02 | 3 | -26/+95 |
| * | trailing whitespace | Jim Grosbach | 2010-09-02 | 1 | -6/+6 |
| * | Now that register allocation properly considers reserved regs, simplify the | Jim Grosbach | 2010-09-02 | 1 | -154/+18 |
| * | Fill in a missing comment. | Bob Wilson | 2010-09-02 | 1 | -2/+2 |
| * | Convert VLD1 and VLD2 instructions to use pseudo-instructions until | Bob Wilson | 2010-09-02 | 4 | -53/+211 |
| * | Clang's -ccc-host-triple was ignoring the arch specifier on my triple, | Eric Christopher | 2010-09-02 | 1 | -22/+3 |
| * | This should be TargetMaterializeConstant instead. | Eric Christopher | 2010-09-02 | 1 | -38/+28 |
| * | One definition of isThumb is plenty, thanks. | Eric Christopher | 2010-09-02 | 1 | -7/+6 |
| * | Remove trailing whitespace | Jim Grosbach | 2010-09-02 | 1 | -31/+31 |
| * | Rework arm fast-isel load and store handling. Move offset computation | Eric Christopher | 2010-09-02 | 1 | -31/+116 |
| * | trivial cleanup | Jim Grosbach | 2010-09-02 | 1 | -4/+2 |
| * | Simplify the tGPR register class now that the register allocators know not | Jim Grosbach | 2010-09-01 | 1 | -26/+1 |
| * | Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, | Bob Wilson | 2010-09-01 | 3 | -37/+207 |
| * | Some basic store support. | Eric Christopher | 2010-09-01 | 1 | -0/+41 |
| * | Add some more load types in. | Eric Christopher | 2010-09-01 | 1 | -2/+22 |
| * | zap dead code. | Chris Lattner | 2010-09-01 | 1 | -2/+2 |
| * | temporarily revert r112664, it is causing a decoding conflict, and | Chris Lattner | 2010-09-01 | 3 | -117/+0 |
| * | We have a chance for an optimization. Consider this code: | Bill Wendling | 2010-08-31 | 3 | -0/+117 |
| * | And ANDS pattern to match the t2ANDS pattern. | Bill Wendling | 2010-08-31 | 1 | -0/+2 |
| * | SP relative offsets need to be adjusted by the local allocation size when | Jim Grosbach | 2010-08-31 | 1 | -0/+4 |
| * | this assert should just be a condition, since this function is just asking if | Jim Grosbach | 2010-08-31 | 1 | -2/+5 |
| * | - Cleanup some whitespaces. | Bill Wendling | 2010-08-31 | 1 | -102/+101 |
| * | Rewrite slightly so we can expand for floating point types easier. | Eric Christopher | 2010-08-31 | 1 | -17/+25 |
| * | If we have an unhandled type then assert, we shouldn't get here for | Eric Christopher | 2010-08-30 | 1 | -1/+3 |
| * | Expand MOVi32imm in ARM mode after regalloc. This provides | Anton Korobeynikov | 2010-08-30 | 1 | -2/+7 |
| * | Use the existing T2I_bin_s_irs pattern instead of creating T2I_bin_sw_irs, which | Bill Wendling | 2010-08-30 | 2 | -69/+2 |
| * | Remember to clear the shadow kill flag at the same time as clearing the real | Jakob Stoklund Olesen | 2010-08-30 | 1 | -0/+1 |
| * | Remove NEON vmovn intrinsic, replacing it with vector truncate operations. | Bob Wilson | 2010-08-30 | 1 | -2/+28 |
| * | Make ARM add rN, sp, #imm instructions rematerializable. That's how the addre... | Jim Grosbach | 2010-08-30 | 3 | -0/+12 |
