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* The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction...Mihai Popa2013-05-134-11/+43
* Correctly preserve the input chain for potential tailcall nodes whoseLang Hames2013-05-131-1/+1
* Remove the MachineMove class.Rafael Espindola2013-05-132-1/+3
* Remove unused argument.Rafael Espindola2013-05-101-1/+1
* Implement AsmParser for ARM unwind directives.Logan Chien2013-05-102-27/+284
* For r181148: fixed warning 'enumeral and non-enumeral type in conditional exp...Stepan Dyatkovskiy2013-05-081-1/+1
* ARM AnalyzeBranch should conservatively return true when it sees a predicatedEvan Cheng2013-05-051-3/+9
* For ARM backend, fixed "byval" attribute support.Stepan Dyatkovskiy2013-05-052-33/+104
* Add ArrayRef constructor from None, and do the cleanups that this constructor...Dmitri Gribenko2013-05-051-2/+2
* Revert r181009.Amara Emerson2013-05-032-8/+139
* Add support for reading ARM ELF build attributes.Amara Emerson2013-05-032-139/+8
* Text files should not be marked executable.Rafael Espindola2013-04-301-0/+0
* s tightens up the encoding description for ARM post-indexed ldr instructions....Mihai Popa2013-04-301-0/+1
* Refactoring patch.Stepan Dyatkovskiy2013-04-305-66/+100
* ARM: Fix encoding of hint instruction for Thumb.Quentin Colombet2013-04-264-16/+22
* ARM/NEON: Pattern match vector integer abs to vabs.Benjamin Kramer2013-04-261-0/+23
* ARM cost model: Integer div and rem is lowered to a function callArnold Schwaighofer2013-04-251-0/+68
* Add more tests for r179925 to verify correct handling of signext/zeroext; str...Stephen Lin2013-04-231-3/+6
* Lowercase "is" boolean variable prefix for consistency within function, no fu...Stephen Lin2013-04-231-12/+12
* No really, don't store anything to this since it's unconditionallyEric Christopher2013-04-221-1/+1
* Remove variable store that is never read.Eric Christopher2013-04-221-1/+1
* Fix for 5.5 Parameter Passing --> Stage C:Stepan Dyatkovskiy2013-04-223-2/+8
* Legalize vector truncates by parts rather than just splitting.Jim Grosbach2013-04-211-3/+3
* ARM: Use ldrd/strd to spill 64-bit pairs when available.Tim Northover2013-04-213-37/+106
* ARM: don't add FrameIndex offset for LDMIA (has no immediate)Tim Northover2013-04-201-1/+1
* Remove unused ShouldFoldAtomicFences flag.Tim Northover2013-04-201-2/+0
* Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover2013-04-201-32/+0
* Add CodeGen support for functions that always return arguments via a new para...Stephen Lin2013-04-205-6/+48
* Test commitStephen Lin2013-04-201-1/+1
* Move TryToFoldFastISelLoad to FastISel, where it belongs. In general, I'mEli Bendersky2013-04-191-5/+5
* ArrayRefize getMachineNode(). No functionality change.Michael Liao2013-04-191-48/+40
* ARM: Permit "sp" in ARM variant of STREXD instructionsTim Northover2013-04-191-1/+1
* ARM: permit "sp" in ARM variants of MOVW/MOVT instructionsTim Northover2013-04-191-2/+3
* [asm parser] Add support for predicating MnemonicAlias based on the assemblerChad Rosier2013-04-181-3/+4
* Fix for PR14824, An ARM Load/Store Optimization bugHao Liu2013-04-181-1/+17
* Add support for subsections to the ELF assembler. Fixes PR8717.Peter Collingbourne2013-04-171-4/+5
* Fix treatment of ARM unallocated hint instructions.Quentin Colombet2013-04-173-4/+29
* Fix build failure introduced in 179591 when assertions are disabled.Logan Chien2013-04-161-0/+4
* Implement ARM unwind opcode assembler.Logan Chien2013-04-165-45/+427
* ARM: Add VACLT and VACLE assembly aliases.Jim Grosbach2013-04-152-0/+19
* ARM: Correct printing of pre-indexed operands.Quentin Colombet2013-04-124-26/+57
* ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.Tim Northover2013-04-105-7/+22
* ARM: Remove unused variable.Benjamin Kramer2013-04-081-2/+0
* Reverting 178851 as it broke buildbotsRenato Golin2013-04-051-161/+10
* Buildbot fix for r178851: mistake was in wrong TargetRegisterInfo::getRegClas...Stepan Dyatkovskiy2013-04-051-1/+1
* Fix for PR14824: "Optimization arm_ldst_opt inserts newly generated instructi...Stepan Dyatkovskiy2013-04-051-10/+161
* ARM scheduler model: Add scheduler info to more instructions and resourceArnold Schwaighofer2013-04-054-32/+67
* ARM scheduler model: Swift has varying latencies, uops for simple ALU opsArnold Schwaighofer2013-04-054-5/+57
* Avoid high-latency false CPSR dependencies even for tMOVSi.Jakob Stoklund Olesen2013-04-041-46/+103
* ARM Scheduler Model: Add resources instructions, map resources in subtargetsArnold Schwaighofer2013-04-014-41/+85