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path: root/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
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* Sink InstructionSelect() out of each target into SDISel, and rename itChris Lattner2010-03-021-7/+0
| | | | | | | | | | | | | | DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader. Sink some other stuff out of DAGISelHeader into SDISel. Eliminate the various 'Indent' stuff from various targets, which dates to when isel was recursive. 17 files changed, 114 insertions(+), 430 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97555 91177308-0d34-0410-b5e6-96231b3b80d8
* remove dupes now.Chris Lattner2010-02-221-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96811 91177308-0d34-0410-b5e6-96231b3b80d8
* move #includes earlier.Chris Lattner2010-02-221-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96810 91177308-0d34-0410-b5e6-96231b3b80d8
* Change SelectCode's argument from SDValue to SDNode *, to make it moreDan Gohman2010-01-051-2/+2
| | | | | | | | | | clear what information these functions are actually using. This is also a micro-optimization, as passing a SDNode * around is simpler than passing a { SDNode *, int } by value or reference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove uninteresting and confusing debug output.Dan Gohman2009-11-051-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86149 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-0/+2
| | | | | | | Finish converting lib/Target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a more function PIC16 backend. However to get this working a patch inSanjiv Gupta2008-11-191-238/+22
| | | | | | | ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59617 91177308-0d34-0410-b5e6-96231b3b80d8
* Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene2008-10-271-1/+1
| | | | | | | | | flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58278 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim #includes.Dan Gohman2008-10-161-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57649 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-031-6/+2
| | | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-121-2/+3
| | | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-281-6/+6
| | | | | | Node to reflect semantics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-3/+3
| | | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
| | | | | | | from all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-14/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim unnecessary #includes.Dan Gohman2008-07-111-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53471 91177308-0d34-0410-b5e6-96231b3b80d8
* Add explicit keywords.Dan Gohman2008-07-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53179 91177308-0d34-0410-b5e6-96231b3b80d8
* Split scheduling from instruction selection.Evan Cheng2008-06-301-6/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52923 91177308-0d34-0410-b5e6-96231b3b80d8
* Detabification. Fixed indentation and spacing.Sanjiv Gupta2008-05-141-33/+27
| | | | | | | | Changed cout to DOUT, and TODOs to FIXMEs. Other changes as per coding conventions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51105 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding files for Microchip's PIC16 target.Sanjiv Gupta2008-05-131-0/+291
A brief description about PIC16: =============================== PIC16 is an 8-bit microcontroller with only one 8-bit register which is the accumulator. All arithmetic/load/store operations are 8-bit only. The architecture has two address spaces: program and data. The program memory is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory. It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register). Two classes of registers exist: (8-bit class which is only one accumulator) (16-bit class, which contains one or more 16 bit pointer(s)) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51027 91177308-0d34-0410-b5e6-96231b3b80d8
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