| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | fix wonky formatting. | Chris Lattner | 2010-09-08 | 1 | -1/+1 |
| * | implement proper support for sysret{,l,q}, rdar://8403907 | Chris Lattner | 2010-09-08 | 1 | -0/+4 |
| * | implement the iret suite of instructions properly, | Chris Lattner | 2010-09-08 | 1 | -1/+2 |
| * | Don't call Predicate_* from X86 target. | Jakob Stoklund Olesen | 2010-09-03 | 1 | -5/+1 |
| * | X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard t... | Daniel Dunbar | 2010-08-27 | 1 | -1/+1 |
| * | X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / c... | Daniel Dunbar | 2010-08-25 | 1 | -4/+3 |
| * | Comment out some broken/unused/useless instructions which mess up disassembly. | Eli Friedman | 2010-08-16 | 1 | -0/+6 |
| * | Set hasSideEffects on the 64-bit no-sse memory barrier. | Eric Christopher | 2010-08-05 | 1 | -1/+1 |
| * | Be a little bit more specific about target for the memory barrier | Eric Christopher | 2010-08-05 | 1 | -1/+2 |
| * | Make x86-64 membarriers work without sse and clean up some of the | Eric Christopher | 2010-08-04 | 1 | -0/+7 |
| * | fix a win64 encoding problem, patch by Cameron Esfahani! | Chris Lattner | 2010-08-03 | 1 | -1/+1 |
| * | Support all 128-bit AVX vector intrinsics. Most part of them I already | Bruno Cardoso Lopes | 2010-07-30 | 1 | -110/+0 |
| * | X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same | Daniel Dunbar | 2010-07-19 | 1 | -2/+2 |
| * | X86-64: Mark WINCALL and more tail call instructions as code gen only. | Daniel Dunbar | 2010-07-19 | 1 | -2/+3 |
| * | X86: Mark In32/64BitMode on LEAVE[64] and SYSEXIT[64]. | Daniel Dunbar | 2010-07-19 | 1 | -2/+2 |
| * | X86: Mark MOV.*_{TC,NOREX} instruction as code gen only, they aren't real. | Daniel Dunbar | 2010-07-19 | 1 | -0/+2 |
| * | Change LEA to have 5 operands for its memory operand, just | Chris Lattner | 2010-07-08 | 1 | -17/+12 |
| * | A slight reworking of the custom patterns for x86-64 tpoff codegen and | Eric Christopher | 2010-07-08 | 1 | -9/+11 |
| * | Use only one multiclass to pinsrq instructions | Bruno Cardoso Lopes | 2010-07-07 | 1 | -24/+0 |
| * | Now that almost all SSE4.1 AVX instructions are added, move code around to mo... | Bruno Cardoso Lopes | 2010-07-07 | 1 | -18/+0 |
| * | Add a couple more quick comments. | Eric Christopher | 2010-06-24 | 1 | -0/+2 |
| * | Update according to feedback. | Eric Christopher | 2010-06-23 | 1 | -1/+1 |
| * | Update uses, defs, and comments for darwin tls patterns. | Eric Christopher | 2010-06-23 | 1 | -7/+4 |
| * | Add some codegen patterns for x86_64-linux-gnu tls codegen matching. | Eric Christopher | 2010-06-21 | 1 | -0/+9 |
| * | Remove isTwoAddress from 64-bit files. | Eric Christopher | 2010-06-18 | 1 | -15/+15 |
| * | Some assorted isTwoAddress -> Constraints cleanup. | Eric Christopher | 2010-06-18 | 1 | -60/+56 |
| * | Ensure that mov and not lea are used to stick the address into | Eric Christopher | 2010-06-08 | 1 | -3/+3 |
| * | Add first pass at darwin tls compiler support. | Eric Christopher | 2010-06-03 | 1 | -0/+13 |
| * | AsmMatcher/X86: Mark _REV instructions as "code gen only", they aren't expected | Daniel Dunbar | 2010-05-26 | 1 | -0/+14 |
| * | The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required | Kevin Enderby | 2010-05-25 | 1 | -1/+2 |
| * | Rename X86 subregister indices to something shorter. | Jakob Stoklund Olesen | 2010-05-24 | 1 | -35/+35 |
| * | MC/X86: Subdivide immediates a bit more, so that we properly recognize immedi... | Daniel Dunbar | 2010-05-22 | 1 | -2/+2 |
| * | MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with ... | Daniel Dunbar | 2010-05-20 | 1 | -0/+7 |
| * | X86: Model i64i32imm properly, as a subclass of all immediates. | Daniel Dunbar | 2010-05-20 | 1 | -1/+3 |
| * | X86: Fix immediate type of FOO64i32 operations. | Daniel Dunbar | 2010-05-20 | 1 | -10/+10 |
| * | Fix assembly parsing and encoding of the pushf and popf family of | Dan Gohman | 2010-05-20 | 1 | -2/+4 |
| * | Set neverHasSideEffects on 64-bit pushf and popf, for consistency with | Dan Gohman | 2010-05-20 | 1 | -2/+2 |
| * | Add mayLoad and mayStore flags to instructions which missed them. | Dan Gohman | 2010-05-14 | 1 | -1/+6 |
| * | fix rdar://7947167 - llvm-mc doesn't match movsq | Chris Lattner | 2010-05-06 | 1 | -4/+10 |
| * | Eliminated the classification of control registers into %ecr_ | Sean Callanan | 2010-05-06 | 1 | -2/+2 |
| * | Fix to r102952. The MOV64toSDrm record in X86Instr64bit.td needed the opcode | Kevin Enderby | 2010-05-04 | 1 | -1/+1 |
| * | Fixed the encoding of two of the X86 movq instuctions. The Move quadword from | Kevin Enderby | 2010-05-03 | 1 | -1/+1 |
| * | Remove the -disable-16bit command-line option, which is now obsolete. | Dan Gohman | 2010-04-30 | 1 | -12/+0 |
| * | Enable i16 to i32 promotion by default. | Evan Cheng | 2010-04-28 | 1 | -0/+5 |
| * | Rather than having a ton of patterns for double shift instructions, e.g. SHLD... | Evan Cheng | 2010-04-28 | 1 | -15/+0 |
| * | fix some modelling problems exposed by a patch I'm working on. bsr/bsf/ptest | Chris Lattner | 2010-03-28 | 1 | -6/+4 |
| * | eliminate the last of the parallel's! | Chris Lattner | 2010-03-27 | 1 | -166/+100 |
| * | remove 64-bit or_is_add parallels. | Chris Lattner | 2010-03-24 | 1 | -6/+3 |
| * | remove the patterns that I commented out in r98930, Dan verified | Chris Lattner | 2010-03-19 | 1 | -113/+0 |
| * | MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen onl... | Daniel Dunbar | 2010-03-19 | 1 | -8/+16 |
