| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Recommitting PALIGNR shift width fixes. | Sean Callanan | 2009-11-20 | 1 | -8/+8 |
| * | Reverting PALIGNR fix until I figure out how this | Sean Callanan | 2009-11-20 | 1 | -8/+8 |
| * | Fixed PALIGNR to take 8-bit rotations in all cases. | Sean Callanan | 2009-11-20 | 1 | -8/+8 |
| * | Re-apply 89011. It's not to be blamed. | Evan Cheng | 2009-11-17 | 1 | -3/+3 |
| * | Revert 89011. Buildbot thinks it might be breaking stuff. | Evan Cheng | 2009-11-17 | 1 | -3/+3 |
| * | A few more instructions that should be marked re-materializable. | Evan Cheng | 2009-11-17 | 1 | -3/+3 |
| * | - Check memoperand alignment instead of checking stack alignment. Most load /... | Evan Cheng | 2009-11-16 | 1 | -1/+1 |
| * | x86 vector shuffle cleanup/fixes: | Nate Begeman | 2009-11-07 | 1 | -29/+7 |
| * | Fix a couple of shuffle patterns to use movhlps instead | Eric Christopher | 2009-11-07 | 1 | -9/+9 |
| * | Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a | Dan Gohman | 2009-10-29 | 1 | -6/+5 |
| * | X86 palignr intrinsics immediate field is in bits. ISel must transform it int... | Evan Cheng | 2009-10-28 | 1 | -24/+29 |
| * | Add support for matching shuffle patterns with palignr. | Nate Begeman | 2009-10-19 | 1 | -0/+33 |
| * | Add support for rematerializing FsFLD0SS and FsFLD0SD as constant-pool | Dan Gohman | 2009-09-21 | 1 | -2/+4 |
| * | Added a variety of floating-point and SSE instructions. | Sean Callanan | 2009-09-16 | 1 | -0/+21 |
| * | Fixed PCMPESTRM128 to have opcode 0x60 instead of 0x62, as specified by the | Sean Callanan | 2009-08-20 | 1 | -2/+2 |
| * | Implement sse4.2 string/text processing instructions: | Eric Christopher | 2009-08-18 | 1 | -0/+117 |
| * | Add 'isCodeGenOnly' bit to Instruction .td records. | Daniel Dunbar | 2009-08-11 | 1 | -4/+6 |
| * | Fix up whitespace, remove commented out code. | Eric Christopher | 2009-08-10 | 1 | -29/+14 |
| * | llvm-mc/AsmMatcher: Change assembler parser match classes to their own record | Daniel Dunbar | 2009-08-10 | 1 | -2/+2 |
| * | Extend comment on ParserMatchClass .td field, and add some missing | Daniel Dunbar | 2009-08-09 | 1 | -0/+2 |
| * | Add crc32 instruction and intrinsics. Add a new class of prefix | Eric Christopher | 2009-08-08 | 1 | -0/+72 |
| * | Whitespace and 80-col cleanup. | Eric Christopher | 2009-07-31 | 1 | -153/+167 |
| * | Add a new register class to describe operands that can't be SP, | Dan Gohman | 2009-07-30 | 1 | -2/+2 |
| * | Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower | Eric Christopher | 2009-07-29 | 1 | -2/+11 |
| * | Update insertps handling based on feedback. Move to a v4f32 style | Eric Christopher | 2009-07-24 | 1 | -14/+10 |
| * | Support insertps via the intrinsic and add a couple of simple | Eric Christopher | 2009-07-23 | 1 | -2/+14 |
| * | Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to | Eli Friedman | 2009-06-19 | 1 | -0/+6 |
| * | Fix an obvious typo. | Eli Friedman | 2009-06-06 | 1 | -1/+1 |
| * | The MONITOR and MWAIT instructions have insufficient information for | Bill Wendling | 2009-05-28 | 1 | -2/+2 |
| * | Fix MOVMSKPDrr encoding. | Evan Cheng | 2009-05-28 | 1 | -1/+1 |
| * | Fix PSIGND encoding bug. Patch by Sean Callanan. | Evan Cheng | 2009-05-28 | 1 | -1/+1 |
| * | "The instructions MMX_PSADBWrm and MMX_PSADBWrr have opcode 0b11100000 (e0), but | Bill Wendling | 2009-05-28 | 1 | -1/+1 |
| * | Fix sfence jit encoding. Patch by Sean Callanan. | Evan Cheng | 2009-05-27 | 1 | -1/+1 |
| * | 80 col violations. | Evan Cheng | 2009-05-12 | 1 | -2/+4 |
| * | Fix infinite recursion in the C++ code which handles movddup by making it unn... | Nate Begeman | 2009-04-29 | 1 | -3/+13 |
| * | 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan. | Nate Begeman | 2009-04-27 | 1 | -319/+225 |
| * | Revert 69952. Causes testsuite failures on linux x86-64. | Rafael Espindola | 2009-04-24 | 1 | -225/+319 |
| * | PR2957 | Nate Begeman | 2009-04-24 | 1 | -319/+225 |
| * | Re-apply 68552. | Rafael Espindola | 2009-04-08 | 1 | -4/+4 |
| * | Temporarily revert r68552. This was causing a failure in the self-hosting LLVM | Bill Wendling | 2009-04-07 | 1 | -4/+4 |
| * | Reduce code duplication on the TLS implementation. | Rafael Espindola | 2009-04-07 | 1 | -4/+4 |
| * | ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these in... | Evan Cheng | 2009-02-26 | 1 | -8/+4 |
| * | Generate better code for v8i16 shuffles on SSE2 | Nate Begeman | 2009-02-23 | 1 | -0/+8 |
| * | Handle llvm.x86.sse2.maskmov.dqu in 64-bit. | Evan Cheng | 2009-02-10 | 1 | -0/+5 |
| * | A few more isAsCheapAsAMove. | Evan Cheng | 2009-02-05 | 1 | -0/+4 |
| * | The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 1... | Evan Cheng | 2009-01-28 | 1 | -18/+16 |
| * | Whitespace and other minor adjustments to make SSE instructions have | Dan Gohman | 2009-01-09 | 1 | -26/+32 |
| * | Fixed x86 code generation of multiple for v2i64. It was incorrect for SSE4.1. | Mon P Wang | 2008-12-18 | 1 | -4/+2 |
| * | Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. | Dan Gohman | 2008-12-03 | 1 | -16/+16 |
| * | Mark x86's V_SET0 and V_SETALLONES with isSimpleLoad, and teach X86's | Dan Gohman | 2008-12-03 | 1 | -2/+6 |
