summaryrefslogtreecommitdiffstats
path: root/lib/Target
Commit message (Expand)AuthorAgeFilesLines
* ARM cost model: Add vector reverse shuffle costsArnold Schwaighofer2013-02-121-0/+33
* ARM NEON: Handle v16i8 and v8i16 reverse shufflesArnold Schwaighofer2013-02-121-1/+37
* Added 0x0D to 2-byte opcode extension table for prefetch* variantsKay Tiong Khoo2013-02-121-4/+2
* [mips] Expand pseudo instructions before they are emitted inAkira Hatanaka2013-02-111-11/+38
* [mips] Fix indentation.Akira Hatanaka2013-02-111-41/+39
* Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek2013-02-114-382/+1470
* Implement HexagonInstrInfo::analyzeCompare.Krzysztof Parzyszek2013-02-112-0/+86
* *fixed disassembly of some i386 system insts with intel syntaxKay Tiong Khoo2013-02-111-4/+4
* R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.Michel Danzer2013-02-111-15/+9
* AArch64: fix build on some MSVC versionsTim Northover2013-02-111-3/+3
* AArch64: Simplify logic in deciding whether bfi is validTim Northover2013-02-111-6/+1
* Make use of DiagnosticType to provide better AArch64 diagnostics.Tim Northover2013-02-112-18/+218
* Currently, codegen may spent some time in SDISel passes even if an entireEvan Cheng2013-02-111-0/+74
* Spelling correctionJoel Jones2013-02-101-1/+1
* Test Commit - Remove some trailing whitespace in R600Instructions.tdVincent Lejeune2013-02-101-6/+6
* [NVPTX] Make address space errors more explicit (llvm_unreachable -> report_f...Justin Holewinski2013-02-091-1/+2
* R600: Dump the function name when TargetLowering::LowerCall() failsTom Stellard2013-02-081-0/+5
* R600: rework flow creation in the structurizer v2Tom Stellard2013-02-081-177/+195
* R600: fix loop analyses in the structurizerTom Stellard2013-02-081-113/+183
* R600: fix PHI value adding in the structurizerTom Stellard2013-02-081-65/+81
* Add the 16 bit version of addiu. To the assembler, the 16 and 32 bit are theReed Kotler2013-02-082-0/+21
* Refine fix to bug 15041.Bill Schmidt2013-02-081-18/+17
* ARM cost model: Address computation in vector mem ops not freeArnold Schwaighofer2013-02-081-2/+11
* When Mips16 frames grow large, the immediate field may exceed the maximumReed Kotler2013-02-083-10/+90
* [mips] Make Filler a class and reduce indentation.Akira Hatanaka2013-02-071-34/+38
* Constrain PowerPC autovectorization to fix bug 15041.Bill Schmidt2013-02-071-0/+19
* [mips] Add definition of JALR instruction which has two register operands. Ch...Akira Hatanaka2013-02-073-3/+14
* R600/SI: cleanup VGPR encodingTom Stellard2013-02-075-178/+16
* R600/SI: Handle VGPR64 destination in copyPhysReg().Tom Stellard2013-02-071-1/+9
* R600/SI: Add pattern for mul.Tom Stellard2013-02-071-0/+4
* R600/SI: simplify and fix SMRD encodingTom Stellard2013-02-076-154/+70
* R600/SI: add proper 64bit immediate support v2Tom Stellard2013-02-073-12/+18
* R600: Add an explicit default processorTom Stellard2013-02-071-0/+1
* R600/SI: Use proper instructions for array/shadow samplers.Tom Stellard2013-02-072-4/+54
* R600/SI: Make sample intrinsic address parameter type overloaded.Tom Stellard2013-02-073-22/+38
* R600/SI: Add basic support for more integer vector types.Tom Stellard2013-02-075-11/+110
* ARM cost model: Add costs for vector selectsArnold Schwaighofer2013-02-071-0/+15
* R600/SI: Add pattern for flog2Michel Danzer2013-02-071-1/+3
* R600: Consolidate sub register indices.Tom Stellard2013-02-078-93/+73
* R600: Add support for SET*_DX10 instructionsTom Stellard2013-02-072-29/+131
* R600: Fix assembly name for SETGT_INTTom Stellard2013-02-071-1/+1
* Make sure we call externals from libraries properly when -static.Reed Kotler2013-02-071-0/+3
* Enable jumps when in -static mode.Reed Kotler2013-02-071-1/+1
* [mips] Make NOP a pseudo instruction and expand it to "sll $zero, $zero, 0".Akira Hatanaka2013-02-063-15/+7
* This is a follow-up on r174446, now taking Atom processors intoEli Bendersky2013-02-061-6/+6
* PPC calling convention cleanup.Bill Schmidt2013-02-062-75/+46
* R600: Support for indirect addressing v4Tom Stellard2013-02-0630-75/+1124
* Implement external weak (ELF) symbols on AArch64Tim Northover2013-02-062-4/+17
* Add AArch64 CRC32 instructionsTim Northover2013-02-061-1/+19
* Add icache prefetch operations to AArch64Tim Northover2013-02-062-0/+12
generated by cgit v1.1 at 2024-12-23 06:45:04 +0000