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* Make MemoryBuiltins aware of TargetLibraryInfo.Benjamin Kramer2012-08-2925-155/+237
* Convert FMA4 patterns to use target specific nodes instead of intrinsics to a...Craig Topper2012-08-293-38/+36
* Add virtual keywords for methods that override the base class.Craig Topper2012-08-291-8/+8
* Cleanup sloppy code. Jakob's review.Andrew Trick2012-08-291-4/+3
* [arm-fast-isel] Add support for ARM PIC.Jush Lu2012-08-291-6/+16
* Fix ARM vector copies of overlapping register tuples.Andrew Trick2012-08-291-0/+13
* cleanupAndrew Trick2012-08-291-21/+19
* Verify the tied operand flags.Jakob Stoklund Olesen2012-08-291-0/+37
* Maintain a vaild isTied bit as operands are added and removed.Jakob Stoklund Olesen2012-08-291-1/+39
* Typo.Chad Rosier2012-08-281-1/+1
* Add comments on the literal value used.Michael Liao2012-08-281-1/+1
* Profile: set branch weight metadata with data generated from profiling.Manman Ren2012-08-285-26/+377
* The instruction DEXT may be transformed into DEXTU or DEXTM dependingJack Carter2012-08-284-3/+54
* Explicitly update the number of nodes to be traversedMichael Liao2012-08-281-1/+1
* Some instructions are passed to the assembler to beJack Carter2012-08-281-20/+24
* Emit word of zeroes after the last instruction as a start of the mandatoryRoman Divacky2012-08-281-0/+15
* Follow-up patch to r162731.Akira Hatanaka2012-08-281-8/+9
* Add a MachineOperand::isTied() flag.Jakob Stoklund Olesen2012-08-281-21/+34
* Don't allow TargetFlags on MO_Register MachineOperands.Jakob Stoklund Olesen2012-08-281-2/+2
* Add PPC Freescale e500mc and e5500 subtargets.Hal Finkel2012-08-288-2/+609
* InstCombine: Defensively avoid undefined shifts by limiting the amount to the...Benjamin Kramer2012-08-281-2/+2
* InstCombine: Guard the transform introduced in r162743 against large ints and...Benjamin Kramer2012-08-281-10/+10
* Make sure that we don't call getZExtValue on values > 64 bits.Nadav Rotem2012-08-281-8/+8
* Teach InstCombine to canonicalize [SU]div+[AL]shl patterns.Nadav Rotem2012-08-281-0/+20
* The commutative flag is already correctly set within the multiclass. If we setBill Wendling2012-08-281-1/+1
* Convert V_SETALLONES/AVX_SETALLONES/AVX2_SETALLONES to Post-RA pseudos.Craig Topper2012-08-283-18/+10
* Merge AVX_SET0PSY/AVX_SET0PDY/AVX2_SET0 into a single post-RA pseudo.Craig Topper2012-08-283-31/+18
* Fix PR12312Michael Liao2012-08-281-10/+112
* Remove extra MayLoad/MayStore flags from atomic_load/store.Jakob Stoklund Olesen2012-08-281-18/+23
* Revert r162713: "Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ...Jakob Stoklund Olesen2012-08-286-169/+43
* Fix mips' long branch pass.Akira Hatanaka2012-08-281-105/+128
* Split several PPC instruction classes.Hal Finkel2012-08-289-102/+269
* Fix bug 13532.Akira Hatanaka2012-08-281-1/+1
* Allow remat of LI on PPC.Hal Finkel2012-08-282-1/+3
* Add the Freescale vendor to Triple.Hal Finkel2012-08-281-0/+2
* Eliminate redundant CR moves on PPC32.Hal Finkel2012-08-283-8/+34
* Optimize zext on PPC64.Hal Finkel2012-08-281-0/+9
* More missing mayLoad flags on AVX multiclasses.Jakob Stoklund Olesen2012-08-281-3/+3
* Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ARM.Jakob Stoklund Olesen2012-08-276-43/+169
* Fix compile error when building with C++11 - clang thinks that PRIx64 is a us...Marshall Clow2012-08-271-2/+2
* Make sure we add the predicate after all of the registers are added.Bill Wendling2012-08-271-2/+3
* Don't use for loops for code that is only intended to execute once. NoDan Gohman2012-08-271-6/+6
* Fix comment.Rafael Espindola2012-08-271-3/+4
* Fix comment for function RuntimeDyldImpl.resolveRelocation()Danil Malyshev2012-08-271-1/+4
* Remove the the block_node_iterator of Region, replace it by the block_iterator.Hongbin Zheng2012-08-272-24/+5
* DWARFDebugRangeList.cpp: Use PRIx64 for uint64_t as format string.NAKAMURA Takumi2012-08-271-2/+3
* Remove MMX shift intrinsic handling code that also exists in SelectionDAGBuil...Craig Topper2012-08-271-56/+0
* [DebugInfo] fixup for r162657: update CMakeLists.txtAlexey Samsonov2012-08-271-0/+1
* Don't allow vextractf128 to be folded with unaligned stores. We don't fold un...Craig Topper2012-08-271-13/+9
* Add basic support for .debug_ranges section to LLVM's DebugInfo library.Alexey Samsonov2012-08-275-5/+136