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* Reapply things reverted back in 97220, with the fixed test case.Sanjiv Gupta2010-02-261-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97228 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix XCoreTargetLowering::isLegalAddressingMode() to handle VoidTy.Richard Osborne2010-02-261-0/+26
| | | | | | | | Previously LoopStrengthReduce would sometimes be unable to find a legal formula, causing an assertion failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97226 91177308-0d34-0410-b5e6-96231b3b80d8
* change the scope node to include a list of children to be checkedChris Lattner2010-02-251-1/+1
| | | | | | | | | | instead of to have a chained series of scope nodes. This makes the generated table smaller, improves the efficiency of the interpreter, and make the factoring optimization much more reasonable to implement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97160 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r97064. Duncan pointed out that bitcasts are defined inDan Gohman2010-02-251-39/+0
| | | | | | | | | terms of store and load, which means bitcasting between scalar integer and vector has endian-specific results, which undermines this whole approach. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97137 91177308-0d34-0410-b5e6-96231b3b80d8
* Make LoopSimplify change conditional branches in loop exiting blocksDan Gohman2010-02-251-2/+1
| | | | | | | | | | | | | which branch on undef to branch on a boolean constant for the edge exiting the loop. This helps ScalarEvolution compute trip counts for loops. Teach ScalarEvolution to recognize single-value PHIs, when safe, and ForgetSymbolicName to forget such single-value PHI nodes as apprpriate in ForgetSymbolicName. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97126 91177308-0d34-0410-b5e6-96231b3b80d8
* Create a stack frame on ARM whenJakob Stoklund Olesen2010-02-241-0/+15
| | | | | | | | | | | - Function uses all scratch registers AND - Function does not use any callee saved registers AND - Stack size is too big to address with immediate offsets. In this case a register must be scavenged to calculate the address of a stack object, and the scavenger needs a spare register or emergency spill slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97071 91177308-0d34-0410-b5e6-96231b3b80d8
* Check for comparisons of +/- zero when optimizing less-than-or-equal andBob Wilson2010-02-241-0/+16
| | | | | | | | | greater-than-or-equal SELECT_CCs to NEON vmin/vmax instructions. This is only allowed when UnsafeFPMath is set or when at least one of the operands is known to be nonzero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97065 91177308-0d34-0410-b5e6-96231b3b80d8
* Make getTypeSizeInBits work correctly for array types; it should returnDan Gohman2010-02-241-0/+39
| | | | | | | | | | | | | | | | the number of value bits, not the number of bits of allocation for in-memory storage. Make getTypeStoreSize and getTypeAllocSize work consistently for arrays and vectors. Fix several places in CodeGen which compute offsets into in-memory vectors to use TargetData information. This fixes PR1784. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97064 91177308-0d34-0410-b5e6-96231b3b80d8
* Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again inDaniel Dunbar2010-02-245-63/+10
| | | | | | the hopes of fixing PPC bootstrap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97040 91177308-0d34-0410-b5e6-96231b3b80d8
* When forming SSE min and max nodes for UGE and ULE comparisons, it'sDan Gohman2010-02-241-13/+429
| | | | | | | | | | | | necessary to swap the operands to handle NaN and negative zero properly. Also, reintroduce logic for checking for NaN conditions when forming SSE min and max instructions, fixed to take into consideration NaNs and negative zeros. This allows forming min and max instructions in more cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97025 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the scheduler from adding nodes in allnodes orderChris Lattner2010-02-244-107/+4
| | | | | | | | | | | | | | | | | | | to adding them in a determinstic order (bottom up from the root) based on the structure of the graph itself. This updates tests for some random changes, interesting bits: CodeGen/Blackfin/promote-logic.ll no longer crashes. I have no idea why, but that's good right? CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but now compiles to have one fewer constant pool entry, making the expected load that was being folded disappear. Since it is an unreduced mass of gnast, I just removed it. This fixes PR6370 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
* LowerCall() should always do getCopyFromReg() to reference the stack pointer.Jim Grosbach2010-02-241-1/+1
| | | | | | | Machine instruction selection is much happier when operands are in virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97012 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply 96540 and 96556 with fixes.Evan Cheng2010-02-245-10/+63
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97011 91177308-0d34-0410-b5e6-96231b3b80d8
* DIV8r must define %AX since X86DAGToDAGISel::Select() sometimes uses itJakob Stoklund Olesen2010-02-241-0/+20
| | | | | | instead of %AL/%AH. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97006 91177308-0d34-0410-b5e6-96231b3b80d8
* Remember to handle sub-registers when moving imp-defs to a rematted instruction.Jakob Stoklund Olesen2010-02-231-0/+49
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96995 91177308-0d34-0410-b5e6-96231b3b80d8
* Keep track of phi join registers explicitly in LiveVariables.Jakob Stoklund Olesen2010-02-231-0/+146
| | | | | | | | Previously, LiveIntervalAnalysis would infer phi joins by looking for multiply defined registers. That doesn't work if the phi join is implicitly defined in all but one of the predecessors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96994 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding the MicroBlaze backend.Wesley Peck2010-02-2314-0/+1339
| | | | | | | | | | | | | | The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower BR_JT on the XCore to a jump into a series of jump instructions.Richard Osborne2010-02-232-0/+156
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96942 91177308-0d34-0410-b5e6-96231b3b80d8
* These should not have been committed.Evan Cheng2010-02-224-46/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96827 91177308-0d34-0410-b5e6-96231b3b80d8
* no need to run llvm-as here.Chris Lattner2010-02-225-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96826 91177308-0d34-0410-b5e6-96231b3b80d8
* Instcombine constant folding can normalize gep with negative index to index ↵Evan Cheng2010-02-224-10/+46
| | | | | | with large offset. When instcombine objsize checking transformation sees these geps where the offset seemingly point out of bound, it should just return "i don't know" rather than asserting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96825 91177308-0d34-0410-b5e6-96231b3b80d8
* Canonicalize ConstantInts to the right operand of commutativeDan Gohman2010-02-221-1/+1
| | | | | | | | | | | operators. The test difference is just due to the multiplication operands being commuted (and thus requiring a more elaborate match). In optimized code, that expression would be folded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96816 91177308-0d34-0410-b5e6-96231b3b80d8
* Actually enable the -enable-unsafe-fp-math tests.Dan Gohman2010-02-221-144/+144
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96796 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark the return address stack slot as mutable when moving the return addressArnold Schwaighofer2010-02-221-0/+55
| | | | | | | | | | | | | | | | | | during a tail call. A parameter might overwrite this stack slot during the tail call. The sequence during a tail call is: 1.) load return address to temp reg 2.) move parameters (might involve storing to return address stack slot) 3.) store return address to new location from temp reg If the stack location is marked immutable CodeGen can colocate load (1) with the store (3). This fixes bug 6225. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96783 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the logic for reasoning about NaNs from the code that formsDan Gohman2010-02-221-44/+168
| | | | | | | | | | | SSE min and max instructions. The real thing this code needs to be concerned about is negative zero. Update the sse-minmax.ll test accordingly, and add tests for -enable-unsafe-fp-math mode as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96775 91177308-0d34-0410-b5e6-96231b3b80d8
* When emitting an instruction which depends on both a post-incrementedDan Gohman2010-02-221-0/+32
| | | | | | | | | | induction variable value and a loop-variant value, don't force the insert position to be at the post-increment position, because it may not be dominated by the loop-variant value. This fixes a use-before-def problem noticed on PPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96774 91177308-0d34-0410-b5e6-96231b3b80d8
* add some no-unwinds, other minor cleanups.Chris Lattner2010-02-213-30/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96756 91177308-0d34-0410-b5e6-96231b3b80d8
* add a triple so that this doesn't fail due to linux/ppc register printing Chris Lattner2010-02-211-1/+1
| | | | | | | syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96748 91177308-0d34-0410-b5e6-96231b3b80d8
* filecheckize and add nouwinds.Chris Lattner2010-02-211-9/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96745 91177308-0d34-0410-b5e6-96231b3b80d8
* IT turns out that during jumpless setcc lowering eq and ne were swapped.Anton Korobeynikov2010-02-211-22/+22
| | | | | | This fixes PR6348 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96734 91177308-0d34-0410-b5e6-96231b3b80d8
* fix and un-xfail X86/vec_ss_load_fold.llChris Lattner2010-02-211-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96720 91177308-0d34-0410-b5e6-96231b3b80d8
* temporarily disable this.Chris Lattner2010-02-211-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96717 91177308-0d34-0410-b5e6-96231b3b80d8
* Check for overflow when scaling up an add or an addrec forDan Gohman2010-02-191-0/+37
| | | | | | | scaled reuse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96692 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.Charles Davis2010-02-191-1/+18
| | | | | | | Also, FileCheck'ize a test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96686 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert commits 96556 and 96640, because commit 96556 breaks theDuncan Sands2010-02-194-46/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dragonegg self-host build. I reverted 96640 in order to revert 96556 (96640 goes on top of 96556), but it also looks like with both of them applied the breakage happens even earlier. The symptom of the 96556 miscompile is the following crash: llvm[3]: Compiling AlphaISelLowering.cpp for Release build cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed. Stack dump: 0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE' g++: Internal error: Aborted (program cc1plus) This occurs when building LLVM using LLVM built by LLVM (via dragonegg). Probably LLVM has miscompiled itself, though it may have miscompiled GCC and/or dragonegg itself: at this point of the self-host build, all of GCC, LLVM and dragonegg were built using LLVM. Unfortunately this kind of thing is extremely hard to debug, and while I did rummage around a bit I didn't find any smoking guns, aka obviously miscompiled code. Found by bisection. r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines Some dag combiner goodness: Transform br (xor (x, y)) -> br (x != y) Transform br (xor (xor (x,y), 1)) -> br (x == y) Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm" r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines Transform (xor (setcc), (setcc)) == / != 1 to (xor (setcc), (setcc)) != / == 1. e.g. On x86_64 %0 = icmp eq i32 %x, 0 %1 = icmp eq i32 %y, 0 %2 = xor i1 %1, %0 br i1 %2, label %bb, label %return => testl %edi, %edi sete %al testl %esi, %esi sete %cl cmpb %al, %cl je LBB1_2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96672 91177308-0d34-0410-b5e6-96231b3b80d8
* Transform (xor (setcc), (setcc)) == / != 1 toEvan Cheng2010-02-191-0/+31
| | | | | | | | | | | | | | | | | | | | (xor (setcc), (setcc)) != / == 1. e.g. On x86_64 %0 = icmp eq i32 %x, 0 %1 = icmp eq i32 %y, 0 %2 = xor i1 %1, %0 br i1 %2, label %bb, label %return => testl %edi, %edi sete %al testl %esi, %esi sete %cl cmpb %al, %cl je LBB1_2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96640 91177308-0d34-0410-b5e6-96231b3b80d8
* When determining the set of interesting reuse factors, considerDan Gohman2010-02-191-1/+57
| | | | | | | | | strides in foreign loops. This helps locate reuse opportunities with existing induction variables in foreign loops and reduces the need for inserting new ones. This fixes rdar://7657764. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96629 91177308-0d34-0410-b5e6-96231b3b80d8
* getSplatIndex assumes that the first element of the mask contains the splat ↵Mon P Wang2010-02-181-5/+12
| | | | | | | | | | index which is not always true if the mask contains undefs. Modified it to return the first non undef value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96621 91177308-0d34-0410-b5e6-96231b3b80d8
* Always normalize spill weights, also for intervals created by spilling.Jakob Stoklund Olesen2010-02-182-2/+6
| | | | | | | | | | | | | | Moderate the weight given to very small intervals. The spill weight given to new intervals created when spilling was not normalized in the same way as the original spill weights calculated by CalcSpillWeights. That meant that restored registers would tend to hang around because they had a much higher spill weight that unspilled registers. This improves the runtime of a few tests by up to 10%, and there are no significant regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96613 91177308-0d34-0410-b5e6-96231b3b80d8
* Make CodePlacementOpt detect special EH control flow byDan Gohman2010-02-181-0/+45
| | | | | | | | | | | checking whether AnalyzeBranch disagrees with the CFG directly, rather than looking for EH_LABEL instructions. EH_LABEL instructions aren't always at the end of the block, due to FP_REG_KILL and other things. This fixes an infinite loop compiling MultiSource/Benchmarks/Bullet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96611 91177308-0d34-0410-b5e6-96231b3b80d8
* remove empty fileChris Lattner2010-02-181-0/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96573 91177308-0d34-0410-b5e6-96231b3b80d8
* Use NEON vmin/vmax instructions for floating-point selects.Bob Wilson2010-02-181-0/+65
| | | | | | | Radar 7461718. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96572 91177308-0d34-0410-b5e6-96231b3b80d8
* Some dag combiner goodness:Evan Cheng2010-02-184-67/+15
| | | | | | | | | Transform br (xor (x, y)) -> br (x != y) Transform br (xor (xor (x,y), 1)) -> br (x == y) Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96556 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't check for comments, which vary between subtargets.Dan Gohman2010-02-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96434 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't attempt to divide INT_MIN by -1; consider such cases toDan Gohman2010-02-171-0/+26
| | | | | | | have overflowed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96428 91177308-0d34-0410-b5e6-96231b3b80d8
* roundss is an sse 4 thing, fix the test on non-sse41 buildersChris Lattner2010-02-171-1/+1
| | | | | | | like llvm-gcc-x86_64-darwin10-selfhost git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96417 91177308-0d34-0410-b5e6-96231b3b80d8
* Make g5 target explicit; scheduling affects register choice.Dale Johannesen2010-02-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96413 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://7653908, a crash on a case where we would fold a loadChris Lattner2010-02-161-0/+25
| | | | | | | | | | | | into a roundss intrinsic, producing a cyclic dag. The root cause of this is badness handling ComplexPattern nodes in the old dagisel that I noticed through inspection. Eliminate a copy of the of the code that handled ComplexPatterns by making EmitChildMatchCode call into EmitMatchCode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96408 91177308-0d34-0410-b5e6-96231b3b80d8
* Adjust register numbers in tests to compensate for theDale Johannesen2010-02-164-14/+14
| | | | | | | | new lack of R2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96407 91177308-0d34-0410-b5e6-96231b3b80d8
* filecheckizeChris Lattner2010-02-161-3/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96404 91177308-0d34-0410-b5e6-96231b3b80d8
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