From 090445967f0b5988446faffefd1d0722f982bc7a Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Thu, 22 Dec 2011 03:03:17 +0000 Subject: Move the Mips only bits of the ELF writer to lib/Target/Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147133 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/MC/ELFObjectWriter.cpp | 102 +-------------- lib/MC/ELFObjectWriter.h | 23 ---- lib/Target/Mips/MCTargetDesc/CMakeLists.txt | 1 + lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp | 23 +--- .../Mips/MCTargetDesc/MipsELFObjectWriter.cpp | 137 +++++++++++++++++++++ lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h | 5 + 6 files changed, 146 insertions(+), 145 deletions(-) create mode 100644 lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp diff --git a/lib/MC/ELFObjectWriter.cpp b/lib/MC/ELFObjectWriter.cpp index 9ab03a0..a733cd8 100644 --- a/lib/MC/ELFObjectWriter.cpp +++ b/lib/MC/ELFObjectWriter.cpp @@ -27,8 +27,6 @@ #include "llvm/Support/CommandLine.h" #include "llvm/ADT/StringSwitch.h" -#include "../Target/Mips/MCTargetDesc/MipsFixupKinds.h" - #include using namespace llvm; @@ -1262,9 +1260,8 @@ MCObjectWriter *llvm::createELFObjectWriter(MCELFObjectTargetWriter *MOTW, case ELF::EM_PPC: case ELF::EM_PPC64: case ELF::EM_MBLAZE: - return new ELFObjectWriter(MOTW, OS, IsLittleEndian); break; case ELF::EM_MIPS: - return new MipsELFObjectWriter(MOTW, OS, IsLittleEndian); break; + return new ELFObjectWriter(MOTW, OS, IsLittleEndian); break; default: llvm_unreachable("Unsupported architecture"); break; } } @@ -1277,100 +1274,3 @@ unsigned ELFObjectWriter::GetRelocType(const MCValue &Target, return TargetObjectWriter->GetRelocType(Target, Fixup, IsPCRel, IsRelocWithSymbol, Addend); } - -/// START OF SUBCLASSES for ELFObjectWriter -//===- MipsELFObjectWriter -------------------------------------------===// - -MipsELFObjectWriter::MipsELFObjectWriter(MCELFObjectTargetWriter *MOTW, - raw_ostream &_OS, - bool IsLittleEndian) - : ELFObjectWriter(MOTW, _OS, IsLittleEndian) {} - -MipsELFObjectWriter::~MipsELFObjectWriter() {} - -// FIXME: get the real EABI Version from the Triple. -unsigned MipsELFObjectWriter::getEFlags() const { - return ELF::EF_MIPS_NOREORDER | ELF::EF_MIPS_ARCH_32R2; -} - -const MCSymbol *MipsELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm, - const MCValue &Target, - const MCFragment &F, - const MCFixup &Fixup, - bool IsPCRel) const { - assert(Target.getSymA() && "SymA cannot be 0."); - const MCSymbol &Sym = Target.getSymA()->getSymbol(); - - if (Sym.getSection().getKind().isMergeableCString() || - Sym.getSection().getKind().isMergeableConst()) - return &Sym; - - return NULL; -} - -unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target, - const MCFixup &Fixup, - bool IsPCRel, - bool IsRelocWithSymbol, - int64_t Addend) const { - // determine the type of the relocation - unsigned Type = (unsigned)ELF::R_MIPS_NONE; - unsigned Kind = (unsigned)Fixup.getKind(); - - switch (Kind) { - default: - llvm_unreachable("invalid fixup kind!"); - case FK_Data_4: - Type = ELF::R_MIPS_32; - break; - case FK_GPRel_4: - Type = ELF::R_MIPS_GPREL32; - break; - case Mips::fixup_Mips_GPREL16: - Type = ELF::R_MIPS_GPREL16; - break; - case Mips::fixup_Mips_26: - Type = ELF::R_MIPS_26; - break; - case Mips::fixup_Mips_CALL16: - Type = ELF::R_MIPS_CALL16; - break; - case Mips::fixup_Mips_GOT_Global: - case Mips::fixup_Mips_GOT_Local: - Type = ELF::R_MIPS_GOT16; - break; - case Mips::fixup_Mips_HI16: - Type = ELF::R_MIPS_HI16; - break; - case Mips::fixup_Mips_LO16: - Type = ELF::R_MIPS_LO16; - break; - case Mips::fixup_Mips_TLSGD: - Type = ELF::R_MIPS_TLS_GD; - break; - case Mips::fixup_Mips_GOTTPREL: - Type = ELF::R_MIPS_TLS_GOTTPREL; - break; - case Mips::fixup_Mips_TPREL_HI: - Type = ELF::R_MIPS_TLS_TPREL_HI16; - break; - case Mips::fixup_Mips_TPREL_LO: - Type = ELF::R_MIPS_TLS_TPREL_LO16; - break; - case Mips::fixup_Mips_TLSLDM: - Type = ELF::R_MIPS_TLS_LDM; - break; - case Mips::fixup_Mips_DTPREL_HI: - Type = ELF::R_MIPS_TLS_DTPREL_HI16; - break; - case Mips::fixup_Mips_DTPREL_LO: - Type = ELF::R_MIPS_TLS_DTPREL_LO16; - break; - case Mips::fixup_Mips_Branch_PCRel: - case Mips::fixup_Mips_PC16: - Type = ELF::R_MIPS_PC16; - break; - } - - return Type; -} diff --git a/lib/MC/ELFObjectWriter.h b/lib/MC/ELFObjectWriter.h index 658a4a9..2776eab 100644 --- a/lib/MC/ELFObjectWriter.h +++ b/lib/MC/ELFObjectWriter.h @@ -354,29 +354,6 @@ class ELFObjectWriter : public MCObjectWriter { bool IsPCRel, bool IsRelocWithSymbol, int64_t Addend) const; }; - - //===- MipsELFObjectWriter -------------------------------------------===// - - class MipsELFObjectWriter : public ELFObjectWriter { - public: - MipsELFObjectWriter(MCELFObjectTargetWriter *MOTW, - raw_ostream &_OS, - bool IsLittleEndian); - - virtual ~MipsELFObjectWriter(); - virtual unsigned getEFlags() const; - - protected: - virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm, - const MCValue &Target, - const MCFragment &F, - const MCFixup &Fixup, - bool IsPCRel) const; - - virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup, - bool IsPCRel, bool IsRelocWithSymbol, - int64_t Addend) const; - }; } #endif diff --git a/lib/Target/Mips/MCTargetDesc/CMakeLists.txt b/lib/Target/Mips/MCTargetDesc/CMakeLists.txt index 0eb0a55..fa23150 100644 --- a/lib/Target/Mips/MCTargetDesc/CMakeLists.txt +++ b/lib/Target/Mips/MCTargetDesc/CMakeLists.txt @@ -3,6 +3,7 @@ add_llvm_library(LLVMMipsDesc MipsMCAsmInfo.cpp MipsMCCodeEmitter.cpp MipsMCTargetDesc.cpp + MipsELFObjectWriter.cpp ) add_dependencies(LLVMMipsDesc MipsCommonTableGen) diff --git a/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp index 0f57d3c..bd9b641 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp @@ -69,15 +69,6 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { } namespace { - -class MipsELFObjectWriter : public MCELFObjectTargetWriter { -public: - MipsELFObjectWriter(bool is64Bit, uint8_t OSABI, uint16_t EMachine, - bool HasRelocationAddend) - : MCELFObjectTargetWriter(is64Bit, OSABI, EMachine, - HasRelocationAddend) {} -}; - class MipsAsmBackend : public MCAsmBackend { public: MipsAsmBackend(const Target &T) : MCAsmBackend() {} @@ -206,12 +197,7 @@ public: : MipsAsmBackend(T), OSABI(_OSABI) {} MCObjectWriter *createObjectWriter(raw_ostream &OS) const { - return createELFObjectWriter(createELFObjectTargetWriter(), - OS, /*IsLittleEndian*/ false); - } - - MCELFObjectTargetWriter *createELFObjectTargetWriter() const { - return new MipsELFObjectWriter(false, OSABI, ELF::EM_MIPS, false); + return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ false, OSABI); } }; @@ -223,12 +209,7 @@ public: : MipsAsmBackend(T), OSABI(_OSABI) {} MCObjectWriter *createObjectWriter(raw_ostream &OS) const { - return createELFObjectWriter(createELFObjectTargetWriter(), - OS, /*IsLittleEndian*/ true); - } - - MCELFObjectTargetWriter *createELFObjectTargetWriter() const { - return new MipsELFObjectWriter(false, OSABI, ELF::EM_MIPS, false); + return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ true, OSABI); } }; } // namespace diff --git a/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp b/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp new file mode 100644 index 0000000..9c2f81e --- /dev/null +++ b/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp @@ -0,0 +1,137 @@ +//===-- MipsELFObjectWriter.cpp - Mips ELF Writer ---------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MCTargetDesc/MipsFixupKinds.h" +#include "MCTargetDesc/MipsMCTargetDesc.h" +#include "llvm/MC/MCELFObjectWriter.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm; + +namespace { + class MipsELFObjectWriter : public MCELFObjectTargetWriter { + public: + MipsELFObjectWriter(uint8_t OSABI); + + virtual ~MipsELFObjectWriter(); + + virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup, + bool IsPCRel, bool IsRelocWithSymbol, + int64_t Addend) const; + virtual unsigned getEFlags() const; + virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm, + const MCValue &Target, + const MCFragment &F, + const MCFixup &Fixup, + bool IsPCRel) const; + }; +} + +MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI) + : MCELFObjectTargetWriter(/*Is64Bit*/ false, OSABI, ELF::EM_MIPS, + /*HasRelocationAddend*/ false) {} + +MipsELFObjectWriter::~MipsELFObjectWriter() {} + +// FIXME: get the real EABI Version from the Triple. +unsigned MipsELFObjectWriter::getEFlags() const { + return ELF::EF_MIPS_NOREORDER | ELF::EF_MIPS_ARCH_32R2; +} + +const MCSymbol *MipsELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm, + const MCValue &Target, + const MCFragment &F, + const MCFixup &Fixup, + bool IsPCRel) const { + assert(Target.getSymA() && "SymA cannot be 0."); + const MCSymbol &Sym = Target.getSymA()->getSymbol(); + + if (Sym.getSection().getKind().isMergeableCString() || + Sym.getSection().getKind().isMergeableConst()) + return &Sym; + + return NULL; +} + +unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target, + const MCFixup &Fixup, + bool IsPCRel, + bool IsRelocWithSymbol, + int64_t Addend) const { + // determine the type of the relocation + unsigned Type = (unsigned)ELF::R_MIPS_NONE; + unsigned Kind = (unsigned)Fixup.getKind(); + + switch (Kind) { + default: + llvm_unreachable("invalid fixup kind!"); + case FK_Data_4: + Type = ELF::R_MIPS_32; + break; + case FK_GPRel_4: + Type = ELF::R_MIPS_GPREL32; + break; + case Mips::fixup_Mips_GPREL16: + Type = ELF::R_MIPS_GPREL16; + break; + case Mips::fixup_Mips_26: + Type = ELF::R_MIPS_26; + break; + case Mips::fixup_Mips_CALL16: + Type = ELF::R_MIPS_CALL16; + break; + case Mips::fixup_Mips_GOT_Global: + case Mips::fixup_Mips_GOT_Local: + Type = ELF::R_MIPS_GOT16; + break; + case Mips::fixup_Mips_HI16: + Type = ELF::R_MIPS_HI16; + break; + case Mips::fixup_Mips_LO16: + Type = ELF::R_MIPS_LO16; + break; + case Mips::fixup_Mips_TLSGD: + Type = ELF::R_MIPS_TLS_GD; + break; + case Mips::fixup_Mips_GOTTPREL: + Type = ELF::R_MIPS_TLS_GOTTPREL; + break; + case Mips::fixup_Mips_TPREL_HI: + Type = ELF::R_MIPS_TLS_TPREL_HI16; + break; + case Mips::fixup_Mips_TPREL_LO: + Type = ELF::R_MIPS_TLS_TPREL_LO16; + break; + case Mips::fixup_Mips_TLSLDM: + Type = ELF::R_MIPS_TLS_LDM; + break; + case Mips::fixup_Mips_DTPREL_HI: + Type = ELF::R_MIPS_TLS_DTPREL_HI16; + break; + case Mips::fixup_Mips_DTPREL_LO: + Type = ELF::R_MIPS_TLS_DTPREL_LO16; + break; + case Mips::fixup_Mips_Branch_PCRel: + case Mips::fixup_Mips_PC16: + Type = ELF::R_MIPS_PC16; + break; + } + + return Type; +} + +MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS, + bool IsLittleEndian, + uint8_t OSABI) { + MCELFObjectTargetWriter *MOTW = new MipsELFObjectWriter(OSABI); + return createELFObjectWriter(MOTW, OS, IsLittleEndian); +} diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h index fc43d2d..de82347 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h +++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h @@ -14,6 +14,8 @@ #ifndef MIPSMCTARGETDESC_H #define MIPSMCTARGETDESC_H +#include "llvm/Support/DataTypes.h" + namespace llvm { class MCAsmBackend; class MCCodeEmitter; @@ -36,6 +38,9 @@ MCCodeEmitter *createMipsMCCodeEmitter(const MCInstrInfo &MCII, MCAsmBackend *createMipsAsmBackend(const Target &T, StringRef TT); +MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS, + bool IsLittleEndian, + uint8_t OSABI); } // End llvm namespace // Defines symbolic names for Mips registers. This defines a mapping from -- cgit v1.1