@@ -429,27 +429,34 @@ infrastructure, which allows us to implement more aggressive algorithms and make
it run faster:
-- The type legalization logic has been completely rewritten, and is now
-more powerful (it supports arbitrary precision integer types for example)
-and hopefully more correct.
-The type legalizer converts operations on types that are not natively
-supported by the target machine into equivalent code sequences that only use
-natively supported types.
-The old type legalizer is still available and will be used if
--disable-legalize-types is passed to llc.
+
- The Writing an LLVM Compiler
+Backend document has been greatly expanded and is substantially more
+complete.
+
+- The SelectionDAG type legalization logic has been completely rewritten, is
+now more powerful (it supports arbitrary precision integer types for example),
+and more correct in several corner cases. The type legalizer converts
+operations on types that are not natively supported by the target machine into
+equivalent code sequences that only use natively supported types. The old type
+legalizer is still available (for now) and will be used if
+-disable-legalize-types is passed to the code generator.
-- ?
-
-how to write a backend doc docs/WritingAnLLVMBackend.html
-asmprinters seperate from targets for jits
-fastisel + exception handling
-vector widening <3 x float> -> <4 x float>
-PBQP register allocator now supports register coalescing.
+- The code generator now supports widening illegal vectors to larger legal
+ones (for example, converting operations on <3 x float> to work on
+<4 x float>) which is very important for common graphics
+applications.
+- The assembly printers for each target are now split out into their own
+libraries that are separate from the main code generation logic. This reduces
+code size of JIT compilers by not requiring them to be linked in.
+- The 'fast' instruction selection path (used at -O0 and for fast JIT
+ compilers) now supports accelerating codegen for code that uses exception
+ handling constructs.
+
+- The optional PBQP register allocator now supports register coalescing.
-
@@ -462,14 +469,34 @@ PBQP register allocator now supports register coalescing.