From 4b0345be3071a5612023588eef689b93f3e94fa4 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Mon, 11 Jan 2010 17:03:47 +0000
Subject: Select an OR with immediate as an ADD if the input bits are known
 zero. This allow the instruction to be 3address-fied if needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93152 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/3addr-or.ll | 11 +++++++++++
 1 file changed, 11 insertions(+)
 create mode 100644 test/CodeGen/X86/3addr-or.ll

(limited to 'test/CodeGen/X86/3addr-or.ll')

diff --git a/test/CodeGen/X86/3addr-or.ll b/test/CodeGen/X86/3addr-or.ll
new file mode 100644
index 0000000..395ba46
--- /dev/null
+++ b/test/CodeGen/X86/3addr-or.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; rdar://7527734
+
+define i32 @test(i32 %x) nounwind readnone ssp {
+entry:
+; CHECK: test:
+; CHECK: leal 3(%rdi), %eax
+  %0 = shl i32 %x, 5                              ; <i32> [#uses=1]
+  %1 = or i32 %0, 3                               ; <i32> [#uses=1]
+  ret i32 %1
+}
-- 
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