diff options
author | Tanguy Pruvot <tanguy.pruvot@gmail.com> | 2013-10-19 14:57:41 +0200 |
---|---|---|
committer | Tanguy Pruvot <tanguy.pruvot@gmail.com> | 2013-10-19 14:57:44 +0200 |
commit | 7b9279ea69dd091a8b659c1ea38266e0fe3fb289 (patch) | |
tree | c433ee246f3975ca8b71fa990c82833baf2bfa87 | |
parent | bc8f4c9aa1c02267ce9642e6f18e6de5106bba37 (diff) | |
download | kernel_samsung_smdk4412-cm-10.2-M1.zip kernel_samsung_smdk4412-cm-10.2-M1.tar.gz kernel_samsung_smdk4412-cm-10.2-M1.tar.bz2 |
tzic: add required ifdef for sec asm extensioncm-10.2-M1
others files using this implements this flag and ifdef
to keep compat with gcc 4.4.3
Change-Id: I290caa7727b750be2f82f13eb5260b877700f81d
-rw-r--r-- | drivers/misc/Makefile | 1 | ||||
-rw-r--r-- | drivers/misc/tzic.c | 8 |
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index b7291cf..881a9af 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -88,4 +88,5 @@ obj-$(CONFIG_SLP_LOWMEM_NOTIFY) += slp_lowmem_notify.o obj-$(CONFIG_MACH_M0_CTC) += cw_tty.o # Secure OS Mobicore Interface +CFLAGS_tzic.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) obj-$(CONFIG_MOBICORE_SUPPORT) += tzic.o diff --git a/drivers/misc/tzic.c b/drivers/misc/tzic.c index e1da409..6a5e3ba 100644 --- a/drivers/misc/tzic.c +++ b/drivers/misc/tzic.c @@ -42,7 +42,9 @@ u32 exynos_smc1(u32 cmd, u32 arg1, u32 arg2, u32 arg3) register u32 reg3 __asm__("r3") = arg3; __asm__ volatile ( - ".arch_extension sec\n" +#ifdef REQUIRES_SEC + ".arch_extension sec\n" +#endif "smc 0\n" : "+r"(reg0), "+r"(reg1), "+r"(reg2), "+r"(reg3) ); @@ -65,7 +67,9 @@ int exynos_smc_read_oemflag(u32 ctrl_word, u32 *val) reg2 = idx; __asm__ volatile ( +#ifdef REQUIRES_SEC ".arch_extension sec\n" +#endif "smc 0\n" :"+r" (reg0), "+r"(reg1), "+r"(reg2), "+r"(reg3) @@ -79,7 +83,9 @@ int exynos_smc_read_oemflag(u32 ctrl_word, u32 *val) reg2 = idx; __asm__ volatile ( +#ifdef REQUIRES_SEC ".arch_extension sec\n" +#endif "smc 0\n" :"+r" (reg0), "+r"(reg1), "+r"(reg2), "+r"(reg3) |