|author||Russell King <firstname.lastname@example.org>||2015-09-11 16:44:02 +0100|
|committer||Ben Hutchings <email@example.com>||2015-10-13 03:46:09 +0100|
ARM: fix Thumb2 signal handling when ARMv6 is enabled
commit 9b55613f42e8d40d5c9ccb8970bde6af4764b2ab upstream. When a kernel is built covering ARMv6 to ARMv7, we omit to clear the IT state when entering a signal handler. This can cause the first few instructions to be conditionally executed depending on the parent context. In any case, the original test for >= ARMv7 is broken - ARMv6 can have Thumb-2 support as well, and an ARMv6T2 specific build would omit this code too. Relax the test back to ARMv6 or greater. This results in us always clearing the IT state bits in the PSR, even on CPUs where these bits are reserved. However, they're reserved for the IT state, so this should cause no harm. Fixes: d71e1352e240 ("Clear the IT state when invoking a Thumb-2 signal handler") Acked-by: Tony Lindgren <firstname.lastname@example.org> Tested-by: H. Nikolaus Schaller <email@example.com> Tested-by: Grazvydas Ignotas <firstname.lastname@example.org> Signed-off-by: Russell King <email@example.com> Signed-off-by: Ben Hutchings <firstname.lastname@example.org>
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index eaa01de..c1d9c77 100644
@@ -486,12 +486,17 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
thumb = handler & 1;
-#if __LINUX_ARM_ARCH__ >= 7
+#if __LINUX_ARM_ARCH__ >= 6
- * Clear the If-Then Thumb-2 execution state
- * ARM spec requires this to be all 000s in ARM mode
- * Snapdragon S4/Krait misbehaves on a Thumb=>ARM
- * signal transition without this.
+ * Clear the If-Then Thumb-2 execution state. ARM spec
+ * requires this to be all 000s in ARM mode. Snapdragon
+ * S4/Krait misbehaves on a Thumb=>ARM signal transition
+ * without this.
+ * We must do this whenever we are running on a Thumb-2
+ * capable CPU, which includes ARMv6T2. However, we elect
+ * to do this whenever we're on an ARMv6 or later CPU for
+ * simplicity.
cpsr &= ~PSR_IT_MASK;