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| author | John W. Linville <linville@tuxdriver.com> | 2005-11-10 00:19:14 +0100 |
|---|---|---|
| committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2005-11-10 00:19:14 +0100 |
| commit | d868dd19ad0828b1b3b56f3b06bd4a39971847be (patch) | |
| tree | e037cbe83e3a5ebe4e77de5fff01538794d57339 | |
| parent | 25000c2c8a6cbf9bba2de6560370ee222b4c613d (diff) | |
| download | kernel_samsung_smdk4412-d868dd19ad0828b1b3b56f3b06bd4a39971847be.zip kernel_samsung_smdk4412-d868dd19ad0828b1b3b56f3b06bd4a39971847be.tar.gz kernel_samsung_smdk4412-d868dd19ad0828b1b3b56f3b06bd4a39971847be.tar.bz2 | |
[PATCH] siimage: enable interrupts on Adaptec SA-1210 card
The siimage driver proports to support the Adaptec SA-1210 SATA
controller. However, at least some of those cards boot-up with their
interrupts disabled internally. The siimage driver currently ignores
that fact, so that driver does not actually work with those cards.
This patch enables those interrupts on cards that need it.
[ This is implemented based on similar code in the libata-based
sata_sil driver. ]
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
| -rw-r--r-- | drivers/ide/pci/siimage.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c index 2b9961b..022d244 100644 --- a/drivers/ide/pci/siimage.c +++ b/drivers/ide/pci/siimage.c @@ -701,6 +701,7 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name) unsigned long barsize = pci_resource_len(dev, 5); u8 tmpbyte = 0; void __iomem *ioaddr; + u32 tmp, irq_mask; /* * Drop back to PIO if we can't map the mmio. Some @@ -726,6 +727,14 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name) pci_set_drvdata(dev, (void *) ioaddr); if (pdev_is_sata(dev)) { + /* make sure IDE0/1 interrupts are not masked */ + irq_mask = (1 << 22) | (1 << 23); + tmp = readl(ioaddr + 0x48); + if (tmp & irq_mask) { + tmp &= ~irq_mask; + writel(tmp, ioaddr + 0x48); + readl(ioaddr + 0x48); /* flush */ + } writel(0, ioaddr + 0x148); writel(0, ioaddr + 0x1C8); } |