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| author | Guenter Roeck <guenter.roeck@ericsson.com> | 2012-03-13 09:05:14 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-03-19 09:02:36 -0700 |
| commit | 2a811f344f5945f728e3b84da164e7dbb94bbccc (patch) | |
| tree | a5e98f9f0a34feb6ae63dbf32df42e8b59730019 /Documentation | |
| parent | b527fd1fe4c9a63648f106098bc0f95bfb63dd5f (diff) | |
| download | kernel_samsung_smdk4412-2a811f344f5945f728e3b84da164e7dbb94bbccc.zip kernel_samsung_smdk4412-2a811f344f5945f728e3b84da164e7dbb94bbccc.tar.gz kernel_samsung_smdk4412-2a811f344f5945f728e3b84da164e7dbb94bbccc.tar.bz2 | |
hwmon: (zl6100) Enable interval between chip accesses for all chips
commit fecfb64422d91a9621a3f96ab75c3a5f13e80b58 upstream.
Intersil reports that all chips supported by the zl6100 driver require
an interval between chip accesses, even ZL2004 and ZL6105 which were thought
to be safe.
Reported-by: Vivek Gani <vgani@intersil.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/hwmon/zl6100 | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/Documentation/hwmon/zl6100 b/Documentation/hwmon/zl6100 index 7617798..c5e1a5b 100644 --- a/Documentation/hwmon/zl6100 +++ b/Documentation/hwmon/zl6100 @@ -73,14 +73,12 @@ Module parameters delay ----- -Some Intersil/Zilker Labs DC-DC controllers require a minimum interval between -I2C bus accesses. According to Intersil, the minimum interval is 2 ms, though -1 ms appears to be sufficient and has not caused any problems in testing. -The problem is known to affect ZL6100, ZL2105, and ZL2008. It is known not to -affect ZL2004 and ZL6105. The driver automatically sets the interval to 1 ms -except for ZL2004 and ZL6105. To enable manual override, the driver provides a -writeable module parameter, 'delay', which can be used to set the interval to -a value between 0 and 65,535 microseconds. +Intersil/Zilker Labs DC-DC controllers require a minimum interval between I2C +bus accesses. According to Intersil, the minimum interval is 2 ms, though 1 ms +appears to be sufficient and has not caused any problems in testing. The problem +is known to affect all currently supported chips. For manual override, the +driver provides a writeable module parameter, 'delay', which can be used to set +the interval to a value between 0 and 65,535 microseconds. Sysfs entries |