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authorShane Huang <shane.huang@amd.com>2014-01-22 14:05:46 -0800
committerBen Hutchings <ben@decadent.org.uk>2014-04-02 00:58:45 +0100
commita1d1c11c3d74677c210fb1a2db4dbeb239dc6d49 (patch)
treebedb2dfe99b6bbce77832f32d84ed018d3a82696 /Documentation
parente4c0c19999194326f5e46bb4711cb1b7c859f156 (diff)
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i2c: piix4: Add support for AMD ML and CZ SMBus changes
commit 032f708bc4f6da868ec49dac48ddf3670d8035d3 upstream. The locations of SMBus register base address and enablement bit are changed from AMD ML, which need this patch to be supported. Signed-off-by: Shane Huang <shane.huang@amd.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> [bwh: Backported to 3.2: - Adjust context - Aux bus support is not included] Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/i2c/busses/i2c-piix42
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4
index 65da157..0982e72 100644
--- a/Documentation/i2c/busses/i2c-piix4
+++ b/Documentation/i2c/busses/i2c-piix4
@@ -8,7 +8,7 @@ Supported adapters:
Datasheet: Only available via NDA from ServerWorks
* ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges
Datasheet: Not publicly available
- * AMD Hudson-2, CZ
+ * AMD Hudson-2, ML, CZ
Datasheet: Not publicly available
* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
Datasheet: Publicly available at the SMSC website http://www.smsc.com