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| author | wanzongshun <mcuos.com@gmail.com> | 2009-12-31 15:06:05 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-01-27 22:03:00 +0000 |
| commit | a62e90308f7b6965310cf4ec61393aef6861f50d (patch) | |
| tree | 3370d9bdd43f2f75607ad59f921adafbecf537a7 /arch/arm/mach-nuc93x/include/mach/regs-timer.h | |
| parent | 74d2e4f8d79ae0c4b6ec027958d5b18058662eea (diff) | |
| download | kernel_samsung_smdk4412-a62e90308f7b6965310cf4ec61393aef6861f50d.zip kernel_samsung_smdk4412-a62e90308f7b6965310cf4ec61393aef6861f50d.tar.gz kernel_samsung_smdk4412-a62e90308f7b6965310cf4ec61393aef6861f50d.tar.bz2 | |
ARM: 5859/1: Add nuc93x platform support
The previous nuc932 support patches have been discarded by me and because it belongs to
another SoCs series named nuc93x,at present, which included nuc931 and nuc932, I think it is
better to create a new mach-nuc93x,So I made the patch,and request your advice.Thanks!
Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-nuc93x/include/mach/regs-timer.h')
| -rw-r--r-- | arch/arm/mach-nuc93x/include/mach/regs-timer.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-nuc93x/include/mach/regs-timer.h b/arch/arm/mach-nuc93x/include/mach/regs-timer.h new file mode 100644 index 0000000..394be96 --- /dev/null +++ b/arch/arm/mach-nuc93x/include/mach/regs-timer.h @@ -0,0 +1,28 @@ +/* + * arch/arm/mach-nuc93x/include/mach/regs-timer.h + * + * Copyright (c) 2008 Nuvoton technology corporation + * All rights reserved. + * + * Wan ZongShun <mcuos.com@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#ifndef __ASM_ARCH_REGS_TIMER_H +#define __ASM_ARCH_REGS_TIMER_H + +/* Timer Registers */ + +#define TMR_BA NUC93X_VA_TIMER +#define REG_TCSR0 (TMR_BA+0x00) +#define REG_TICR0 (TMR_BA+0x08) +#define REG_TDR0 (TMR_BA+0x10) +#define REG_TISR (TMR_BA+0x18) +#define REG_WTCR (TMR_BA+0x1C) + +#endif /* __ASM_ARCH_REGS_TIMER_H */ |