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| author | Sumit Semwal <sumit.semwal@ti.com> | 2011-01-31 16:27:43 +0000 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-03-11 15:46:22 +0200 |
| commit | 872462cdfc74e7b93c09870128d9bb436d4e9804 (patch) | |
| tree | 3334df4774a219b79ae9422c50ea5e2d4be9894c /arch/arm/mach-omap2/clock2420_data.c | |
| parent | ef631f82500390b3dfc20b16214e53c443d675a4 (diff) | |
| download | kernel_samsung_smdk4412-872462cdfc74e7b93c09870128d9bb436d4e9804.zip kernel_samsung_smdk4412-872462cdfc74e7b93c09870128d9bb436d4e9804.tar.gz kernel_samsung_smdk4412-872462cdfc74e7b93c09870128d9bb436d4e9804.tar.bz2 | |
OMAP2PLUS: clocks: Align DSS clock names and roles
Currently, clock database has <dev, clock-name> tuples for DSS2. Because of
this, the clock names are different across different OMAP platforms.
This patch aligns the DSS2 clock names and roles across OMAP 2420, 2430, 3xxx,
44xx platforms in the clock databases, hwmod databases for opt-clocks, and DSS
clock handling.
This ensures that clk_get/put/enable/disable APIs in DSS can use uniform role
names.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock2420_data.c')
| -rw-r--r-- | arch/arm/mach-omap2/clock2420_data.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 9ece62a..26d89d5 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -1787,9 +1787,9 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "gfx_ick", &gfx_ick, CK_242X), /* DSS domain clocks */ CLK("omapdss_dss", "ick", &dss_ick, CK_242X), - CLK("omapdss_dss", "dss1_fck", &dss1_fck, CK_242X), - CLK("omapdss_dss", "dss2_fck", &dss2_fck, CK_242X), - CLK("omapdss_dss", "tv_fck", &dss_54m_fck, CK_242X), + CLK("omapdss_dss", "fck", &dss1_fck, CK_242X), + CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_242X), + CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_242X), /* L3 domain clocks */ CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X), CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X), |