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| author | Sanjeev Premi <premi@ti.com> | 2009-03-13 21:34:25 +0530 |
|---|---|---|
| committer | Kevin Hilman <khilman@deeprootsystems.com> | 2009-11-11 14:42:49 -0800 |
| commit | 8e431edb60ef175e6aa986e8260b23cc267a13fb (patch) | |
| tree | 9957e477088ecf387e6409ce175029d4006652b0 /arch/arm/mach-omap2/cpuidle34xx.c | |
| parent | 06d8f065b3bac1673825be744d22742ad72f9c2a (diff) | |
| download | kernel_samsung_smdk4412-8e431edb60ef175e6aa986e8260b23cc267a13fb.zip kernel_samsung_smdk4412-8e431edb60ef175e6aa986e8260b23cc267a13fb.tar.gz kernel_samsung_smdk4412-8e431edb60ef175e6aa986e8260b23cc267a13fb.tar.bz2 | |
OMAP3: PM: CPUidle: Start C-state definitions from base 0
The current definition of C-states starts from base 1.
Whereas, the cpuidle driver uses base 0. This patch
eliminates need for explicit mapping (add/ sbutract)
due to different base values.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/cpuidle34xx.c')
| -rw-r--r-- | arch/arm/mach-omap2/cpuidle34xx.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index c11377d..5128b8c 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -35,14 +35,14 @@ #ifdef CONFIG_CPU_IDLE -#define OMAP3_MAX_STATES 8 -#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */ -#define OMAP3_STATE_C2 2 /* C2 - MPU WFI + Core inactive */ -#define OMAP3_STATE_C3 3 /* C3 - MPU CSWR + Core inactive */ -#define OMAP3_STATE_C4 4 /* C4 - MPU OFF + Core iactive */ -#define OMAP3_STATE_C5 5 /* C5 - MPU RET + Core RET */ -#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core RET */ -#define OMAP3_STATE_C7 7 /* C7 - MPU OFF + Core OFF */ +#define OMAP3_MAX_STATES 7 +#define OMAP3_STATE_C1 0 /* C1 - MPU WFI + Core active */ +#define OMAP3_STATE_C2 1 /* C2 - MPU WFI + Core inactive */ +#define OMAP3_STATE_C3 2 /* C3 - MPU CSWR + Core inactive */ +#define OMAP3_STATE_C4 3 /* C4 - MPU OFF + Core iactive */ +#define OMAP3_STATE_C5 4 /* C5 - MPU RET + Core RET */ +#define OMAP3_STATE_C6 5 /* C6 - MPU OFF + Core RET */ +#define OMAP3_STATE_C7 6 /* C7 - MPU OFF + Core OFF */ struct omap3_processor_cx { u8 valid; @@ -279,7 +279,7 @@ int __init omap3_idle_init(void) dev = &per_cpu(omap3_idle_dev, smp_processor_id()); - for (i = 1; i < OMAP3_MAX_STATES; i++) { + for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { cx = &omap3_power_states[i]; state = &dev->states[count]; |