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| author | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:14 -0700 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:14 -0700 |
| commit | dac9a77120e2724e22696f06f3ecb4838da1e3e4 (patch) | |
| tree | 7f7d91166a35efcdd4daf3e161e6532892250ef1 /arch/arm/mach-omap2/prcm.c | |
| parent | 2ace831ffc8feaffb8bc03da89ff43d948efdc97 (diff) | |
| download | kernel_samsung_smdk4412-dac9a77120e2724e22696f06f3ecb4838da1e3e4.zip kernel_samsung_smdk4412-dac9a77120e2724e22696f06f3ecb4838da1e3e4.tar.gz kernel_samsung_smdk4412-dac9a77120e2724e22696f06f3ecb4838da1e3e4.tar.bz2 | |
OMAP4: PRCM: move global reset function for OMAP4 to an OMAP4-specific file
Move the OMAP4 global software reset function to the OMAP4-specific
prm44xx.c file, where it belongs. Part of the long-term process of
moving all of the direct PRCM register writes into lower-layer code.
Also add OCP barriers on OMAP2/3/4 to reduce the chance that the MPU
will continue executing while the system is supposed to be resetting
itself.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/prcm.c')
| -rw-r--r-- | arch/arm/mach-omap2/prcm.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index fe0865b..68c541f 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -68,17 +68,16 @@ void omap_prcm_arch_reset(char mode, const char *cmd) } else if (cpu_is_omap34xx()) { prcm_offs = OMAP3430_GR_MOD; omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); - } else if (cpu_is_omap44xx()) - prcm_offs = OMAP4430_PRM_DEVICE_INST; - else + } else if (cpu_is_omap44xx()) { + omap4_prm_global_warm_sw_reset(); /* never returns */ + } else { WARN_ON(1); + } - if (cpu_is_omap24xx() || cpu_is_omap34xx()) - prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, - OMAP2_RM_RSTCTRL); - if (cpu_is_omap44xx()) - prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_WARM_SW_MASK, - prcm_offs, OMAP4_RM_RSTCTRL); + /* XXX should be moved to some OMAP2/3 specific code */ + prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, + OMAP2_RM_RSTCTRL); + prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ } /** |