diff options
author | rogersb11 <brettrogers11@gmail.com> | 2015-11-10 11:19:31 -0600 |
---|---|---|
committer | rogersb11 <brettrogers11@gmail.com> | 2015-11-10 14:01:25 -0500 |
commit | b4d16f70c34ecb908c8a61e58ea51fecdd4a4b10 (patch) | |
tree | 973e9aeb97bb13497d17a43e6f3c070381bc5b87 /arch/arm/mach-pxa/smemc.c | |
parent | d177fbc2f0c263b06c18bda2eb46200a31bcbebd (diff) | |
parent | 5dba9ddd98cbc7ad319d687887981a0ea0062c75 (diff) | |
download | kernel_samsung_smdk4412-b4d16f70c34ecb908c8a61e58ea51fecdd4a4b10.zip kernel_samsung_smdk4412-b4d16f70c34ecb908c8a61e58ea51fecdd4a4b10.tar.gz kernel_samsung_smdk4412-b4d16f70c34ecb908c8a61e58ea51fecdd4a4b10.tar.bz2 |
Merge remote-tracking branch 'korg/linux-3.0.y' into cm-13.0
Conflicts:
crypto/algapi.c
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/intel_display.c
drivers/video/fbmem.c
include/linux/nls.h
kernel/cgroup.c
kernel/signal.c
kernel/timeconst.pl
net/ipv4/ping.c
Change-Id: I1f532925d1743df74d66bcdd6fc92f05c72ee0dd
Diffstat (limited to 'arch/arm/mach-pxa/smemc.c')
-rw-r--r-- | arch/arm/mach-pxa/smemc.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c index 7992305..f38aa89 100644 --- a/arch/arm/mach-pxa/smemc.c +++ b/arch/arm/mach-pxa/smemc.c @@ -40,6 +40,8 @@ static void pxa3xx_smemc_resume(void) __raw_writel(csadrcfg[1], CSADRCFG1); __raw_writel(csadrcfg[2], CSADRCFG2); __raw_writel(csadrcfg[3], CSADRCFG3); + /* CSMSADRCFG wakes up in its default state (0), so we need to set it */ + __raw_writel(0x2, CSMSADRCFG); } static struct syscore_ops smemc_syscore_ops = { @@ -49,8 +51,19 @@ static struct syscore_ops smemc_syscore_ops = { static int __init smemc_init(void) { - if (cpu_is_pxa3xx()) + if (cpu_is_pxa3xx()) { + /* + * The only documentation we have on the + * Chip Select Configuration Register (CSMSADRCFG) is that + * it must be programmed to 0x2. + * Moreover, in the bit definitions, the second bit + * (CSMSADRCFG[1]) is called "SETALWAYS". + * Other bits are reserved in this register. + */ + __raw_writel(0x2, CSMSADRCFG); + register_syscore_ops(&smemc_syscore_ops); + } return 0; } |