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| author | Seungwhan Youn <sw.youn@samsung.com> | 2010-10-14 10:39:08 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-25 16:05:56 +0900 |
| commit | d4b34c6c849d67b7afaa90d55dc7fab981c72950 (patch) | |
| tree | c6b5c6bfe622832865a98fecec1159cb350bc18a /arch/arm/mach-s5p64x0/clock-s5p6450.c | |
| parent | 900fa0196c564895bfa2eb412d2a83421d3f3444 (diff) | |
| download | kernel_samsung_smdk4412-d4b34c6c849d67b7afaa90d55dc7fab981c72950.zip kernel_samsung_smdk4412-d4b34c6c849d67b7afaa90d55dc7fab981c72950.tar.gz kernel_samsung_smdk4412-d4b34c6c849d67b7afaa90d55dc7fab981c72950.tar.bz2 | |
ARM: S5P: Reduce duplicated EPLL control codes
S5P Samsung SoCs has a EPLL to support various PLL clock sources for other
H/W blocks. Until now, to control EPLL, each of SoCs make their own functions
in 'mach-s5pxxx/clock.c'. But some of functions, 'xxx_epll_get_rate()' and
'xxx_epll_enable()', are exactly same in all S5P SoCs, so this patch move
these duplicated codes to common EPLL functions that use platform wide.
Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p64x0/clock-s5p6450.c')
| -rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6450.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index f9afb05..f1498d3 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c @@ -86,7 +86,7 @@ static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate) } static struct clk_ops s5p6450_epll_ops = { - .get_rate = s5p64x0_epll_get_rate, + .get_rate = s5p_epll_get_rate, .set_rate = s5p6450_epll_set_rate, }; @@ -581,7 +581,7 @@ void __init_or_cpufreq s5p6450_setup_clocks(void) /* Set S5P6450 functions for clk_fout_epll */ - clk_fout_epll.enable = s5p64x0_epll_enable; + clk_fout_epll.enable = s5p_epll_enable; clk_fout_epll.ops = &s5p6450_epll_ops; clk_48m.enable = s5p64x0_clk48m_ctrl; |