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author | Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de> | 2015-10-23 06:06:09 +0200 |
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committer | Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de> | 2015-10-23 06:06:09 +0200 |
commit | 499ba610c2829adafbf393c2f3773d73ae4445f3 (patch) | |
tree | fae89854e0b3e704dd6410780e392901df1a6759 /arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | |
parent | 817ba283acf2d7b5aa073b96fd989f336fcff72a (diff) | |
download | kernel_samsung_smdk4412-499ba610c2829adafbf393c2f3773d73ae4445f3.zip kernel_samsung_smdk4412-499ba610c2829adafbf393c2f3773d73ae4445f3.tar.gz kernel_samsung_smdk4412-499ba610c2829adafbf393c2f3773d73ae4445f3.tar.bz2 |
merge more graphics stuff from 3.2.72
Diffstat (limited to 'arch/arm/mach-s5p64x0/include/mach/regs-gpio.h')
-rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h index 0953ef6..cfdfa4f 100644 --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h @@ -34,4 +34,35 @@ #define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) #define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) +#define S5P64X0_SPCON0 (S5P_VA_GPIO + 0x1A0) +#define S5P64X0_SPCON0_LCD_SEL_MASK (0x3 << 0) +#define S5P64X0_SPCON0_LCD_SEL_RGB (0x1 << 0) +#define S5P64X0_SPCON1 (S5P_VA_GPIO + 0x2B0) + +#define S5P64X0_MEM0CONSLP0 (S5P_VA_GPIO + 0x1C0) +#define S5P64X0_MEM0CONSLP1 (S5P_VA_GPIO + 0x1C4) +#define S5P64X0_MEM0DRVCON (S5P_VA_GPIO + 0x1D0) +#define S5P64X0_MEM1DRVCON (S5P_VA_GPIO + 0x1D4) + +#define S5P64X0_EINT12CON (S5P_VA_GPIO + 0x200) +#define S5P64X0_EINT12FLTCON (S5P_VA_GPIO + 0x220) +#define S5P64X0_EINT12MASK (S5P_VA_GPIO + 0x240) + +/* External interrupt control registers for group0 */ + +#define EINT0CON0_OFFSET (0x900) +#define EINT0FLTCON0_OFFSET (0x910) +#define EINT0FLTCON1_OFFSET (0x914) +#define EINT0MASK_OFFSET (0x920) +#define EINT0PEND_OFFSET (0x924) + +#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET) +#define S5P64X0_EINT0FLTCON0 (S5P_VA_GPIO + EINT0FLTCON0_OFFSET) +#define S5P64X0_EINT0FLTCON1 (S5P_VA_GPIO + EINT0FLTCON1_OFFSET) +#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET) +#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET) + +#define S5P64X0_SLPEN (S5P_VA_GPIO + 0x930) +#define S5P64X0_SLPEN_USE_xSLP (1 << 0) + #endif /* __ASM_ARCH_REGS_GPIO_H */ |