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author | Paul Mundt <lethal@linux-sh.org> | 2011-03-31 15:39:47 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2011-03-31 15:39:47 +0900 |
commit | 7ea5db8efeac8627500e012aa6829ca612c5a700 (patch) | |
tree | 90e4de22f60b989dcf0f0d7436978c0b463d5827 /arch/arm/plat-mxc/include/mach | |
parent | eee7631fdf8ae63c4f24daf66981ac1a7b55d7fd (diff) | |
parent | 6aba74f2791287ec407e0f92487a725a25908067 (diff) | |
download | kernel_samsung_smdk4412-7ea5db8efeac8627500e012aa6829ca612c5a700.zip kernel_samsung_smdk4412-7ea5db8efeac8627500e012aa6829ca612c5a700.tar.gz kernel_samsung_smdk4412-7ea5db8efeac8627500e012aa6829ca612c5a700.tar.bz2 |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into sh-latest
Diffstat (limited to 'arch/arm/plat-mxc/include/mach')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/audmux.h | 10 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx2x.h | 12 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx50.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx51.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mxc.h | 23 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/system.h | 6 |
6 files changed, 48 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h index 5cd6466..6fda788 100644 --- a/arch/arm/plat-mxc/include/mach/audmux.h +++ b/arch/arm/plat-mxc/include/mach/audmux.h @@ -15,6 +15,14 @@ #define MX31_AUDMUX_PORT5_SSI_PINS_5 4 #define MX31_AUDMUX_PORT6_SSI_PINS_6 5 +#define MX51_AUDMUX_PORT1_SSI0 0 +#define MX51_AUDMUX_PORT2_SSI1 1 +#define MX51_AUDMUX_PORT3 2 +#define MX51_AUDMUX_PORT4 3 +#define MX51_AUDMUX_PORT5 4 +#define MX51_AUDMUX_PORT6 5 +#define MX51_AUDMUX_PORT7 6 + /* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ #define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) #define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) @@ -28,7 +36,7 @@ #define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) #define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) -/* Register definitions for the i.MX25/31/35 Digital Audio Multiplexer */ +/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */ #define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) #define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) #define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h index c4f116d..7a9b20a 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h @@ -90,12 +90,12 @@ #define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) #define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) #define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) -#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) -#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) -#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) -#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) -#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) -#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) +#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19) +#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20) +#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21) +#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22) +#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 23) +#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24) #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) #define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h index aaec2a6..5f2da75a 100644 --- a/arch/arm/plat-mxc/include/mach/mx50.h +++ b/arch/arm/plat-mxc/include/mach/mx50.h @@ -282,4 +282,8 @@ #define MX50_INT_APBHDMA_CHAN6 116 #define MX50_INT_APBHDMA_CHAN7 117 +#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) +extern int mx50_revision(void); +#endif + #endif /* ifndef __MACH_MX50_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 1eb339e..dede19a 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -347,6 +347,7 @@ #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) extern int mx51_revision(void); +extern void mx51_display_revision(void); #endif /* tape-out 1 defines */ diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 7e07263..1aea818 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h @@ -51,6 +51,20 @@ #define IMX_CHIP_REVISION_3_3 0x33 #define IMX_CHIP_REVISION_UNKNOWN 0xff +#define IMX_CHIP_REVISION_1_0_STRING "1.0" +#define IMX_CHIP_REVISION_1_1_STRING "1.1" +#define IMX_CHIP_REVISION_1_2_STRING "1.2" +#define IMX_CHIP_REVISION_1_3_STRING "1.3" +#define IMX_CHIP_REVISION_2_0_STRING "2.0" +#define IMX_CHIP_REVISION_2_1_STRING "2.1" +#define IMX_CHIP_REVISION_2_2_STRING "2.2" +#define IMX_CHIP_REVISION_2_3_STRING "2.3" +#define IMX_CHIP_REVISION_3_0_STRING "3.0" +#define IMX_CHIP_REVISION_3_1_STRING "3.1" +#define IMX_CHIP_REVISION_3_2_STRING "3.2" +#define IMX_CHIP_REVISION_3_3_STRING "3.3" +#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown" + #ifndef __ASSEMBLY__ extern unsigned int __mxc_cpu_type; #endif @@ -181,6 +195,15 @@ struct cpu_op { u32 cpu_rate; }; +int tzic_enable_wake(int is_idle); +enum mxc_cpu_pwr_mode { + WAIT_CLOCKED, /* wfi only */ + WAIT_UNCLOCKED, /* WAIT */ + WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ + STOP_POWER_ON, /* just STOP */ + STOP_POWER_OFF, /* STOP + SRPG */ +}; + extern struct cpu_op *(*get_cpu_op)(int *op); #endif diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h index 95be51b..0417da9 100644 --- a/arch/arm/plat-mxc/include/mach/system.h +++ b/arch/arm/plat-mxc/include/mach/system.h @@ -20,6 +20,8 @@ #include <mach/hardware.h> #include <mach/common.h> +extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); + static inline void arch_idle(void) { #ifdef CONFIG_ARCH_MXC91231 @@ -54,7 +56,9 @@ static inline void arch_idle(void) "orr %0, %0, #0x00000004\n" "mcr p15, 0, %0, c1, c0, 0\n" : "=r" (reg)); - } else + } else if (cpu_is_mx51()) + mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + else cpu_do_idle(); } |