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| author | Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de> | 2015-10-23 06:06:09 +0200 |
|---|---|---|
| committer | Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de> | 2015-10-23 06:06:09 +0200 |
| commit | 499ba610c2829adafbf393c2f3773d73ae4445f3 (patch) | |
| tree | fae89854e0b3e704dd6410780e392901df1a6759 /arch/arm/plat-omap/include/plat/clock.h | |
| parent | 817ba283acf2d7b5aa073b96fd989f336fcff72a (diff) | |
| download | kernel_samsung_smdk4412-499ba610c2829adafbf393c2f3773d73ae4445f3.zip kernel_samsung_smdk4412-499ba610c2829adafbf393c2f3773d73ae4445f3.tar.gz kernel_samsung_smdk4412-499ba610c2829adafbf393c2f3773d73ae4445f3.tar.bz2 | |
merge more graphics stuff from 3.2.72
Diffstat (limited to 'arch/arm/plat-omap/include/plat/clock.h')
| -rw-r--r-- | arch/arm/plat-omap/include/plat/clock.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 006e599..eb73ab4 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h @@ -58,10 +58,12 @@ struct clkops { #define RATE_IN_36XX (1 << 4) #define RATE_IN_4430 (1 << 5) #define RATE_IN_TI816X (1 << 6) +#define RATE_IN_4460 (1 << 7) #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) #define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) #define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX) +#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460) /* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */ #define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX) @@ -78,8 +80,6 @@ struct clkops { * * @div is the divisor that should be applied to the parent clock's rate * to produce the current clock's rate. - * - * XXX @flags probably should be replaced with an struct omap_chip. */ struct clksel_rate { u32 val; @@ -152,7 +152,7 @@ struct dpll_data { u16 max_multiplier; u8 last_rounded_n; u8 min_divider; - u8 max_divider; + u16 max_divider; u8 modes; #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) void __iomem *autoidle_reg; @@ -165,8 +165,8 @@ struct dpll_data { u8 auto_recal_bit; u8 recal_en_bit; u8 recal_st_bit; - u8 flags; # endif + u8 flags; }; #endif |