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authorDaniel Hillenbrand <daniel.hillenbrand@codeworkx.de>2012-07-21 23:04:45 +0200
committerDaniel Hillenbrand <daniel.hillenbrand@codeworkx.de>2012-07-21 23:04:45 +0200
commit0a1182796f6475b8cb2ff1781dad873a744b3197 (patch)
treee15b5256dac226c49a25b5e24594cd638e2fec2c /arch/arm/plat-s5p
parent633018c13fe06461d9c60692fbb114734aa37802 (diff)
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samsung opensource update3
Diffstat (limited to 'arch/arm/plat-s5p')
-rw-r--r--arch/arm/plat-s5p/dev-dsim.c11
-rw-r--r--arch/arm/plat-s5p/dev-fimd-s5p.c1
-rw-r--r--arch/arm/plat-s5p/include/plat/fb-s5p.h33
-rw-r--r--arch/arm/plat-s5p/include/plat/regs-fb-s5p.h7
4 files changed, 10 insertions, 42 deletions
diff --git a/arch/arm/plat-s5p/dev-dsim.c b/arch/arm/plat-s5p/dev-dsim.c
index 0467c63..850172d 100644
--- a/arch/arm/plat-s5p/dev-dsim.c
+++ b/arch/arm/plat-s5p/dev-dsim.c
@@ -36,19 +36,9 @@ static struct dsim_config dsim_info = {
.e_no_data_lane = DSIM_DATA_LANE_4,
.e_byte_clk = DSIM_PLL_OUT_DIV8,
-#ifdef CONFIG_MACH_JENGA
- .p = 3,
- .m = 75,
- .s = 0,
-#endif
-
.pll_stable_time = 500, /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
-#ifdef CONFIG_MACH_JENGA
- .esc_clk = 10 * 1000000, /* escape clk : 10MHz */
-#else
.esc_clk = 20 * 1000000, /* escape clk : 10MHz */
-#endif
.stop_holding_cnt = 0, /* stop state holding counter after bta change count 0 ~ 0xfff */
.bta_timeout = 0xff, /* bta timeout 0 ~ 0xff */
@@ -96,7 +86,6 @@ static struct s5p_platform_dsim dsim_platform_data = {
/* default platform revision is 0(evt0). */
.platform_rev = 0,
- .cfg_gpio = exynos4_dsim_gpio_setup_24bpp,
};
struct platform_device s5p_device_dsim = {
diff --git a/arch/arm/plat-s5p/dev-fimd-s5p.c b/arch/arm/plat-s5p/dev-fimd-s5p.c
index 80d0bfd..57b322b 100644
--- a/arch/arm/plat-s5p/dev-fimd-s5p.c
+++ b/arch/arm/plat-s5p/dev-fimd-s5p.c
@@ -89,6 +89,7 @@ void __init s3cfb_set_platdata(struct s3c_platform_fb *pd)
#endif
s3cfb_get_clk_name(npd->clk_name);
+ npd->set_display_path = s3cfb_set_display_path;
npd->cfg_gpio = s3cfb_cfg_gpio;
npd->backlight_on = s3cfb_backlight_on;
npd->backlight_off = s3cfb_backlight_off;
diff --git a/arch/arm/plat-s5p/include/plat/fb-s5p.h b/arch/arm/plat-s5p/include/plat/fb-s5p.h
index 017a8b0..28721c9 100644
--- a/arch/arm/plat-s5p/include/plat/fb-s5p.h
+++ b/arch/arm/plat-s5p/include/plat/fb-s5p.h
@@ -43,37 +43,7 @@ struct s3c_platform_fb {
int default_win;
int swap;
void *lcd;
-#ifdef CONFIG_FB_S5P_MIPI_DSIM
- unsigned int sub_lcd_enabled;
- unsigned int machine_is_cypress;
- unsigned int machine_is_p1p2;
- unsigned int mdnie_is_enabled;
- unsigned int mipi_is_enabled;
- unsigned int interface_mode;
-
- void *single_lcd;
- void *dual_lcd;
-
- void (*set_display_path)(unsigned int mode);
- int (*reset_lcd)(void);
-
- /* variables and interface for mDNIe */
- char mdnie_clk_name[20];
- void *mdnie_clk;
- unsigned int mdnie_phy_base;
- unsigned int ielcd_phy_base;
- void __iomem *mdnie_mmio_base;
- void __iomem *ielcd_mmio_base;
- unsigned char mdnie_mode;
-
- void (*set_mdnie_clock)(void *mdnie_clk, unsigned char enable);
- void (*init_mdnie)(unsigned int mdnie_base,
- unsigned int hsize, unsigned int vsize);
- void (*mdnie_set_mode)(unsigned int mdnie_base, unsigned char mode);
-
- void (*start_ielcd_logic)(unsigned int ielcd_base);
- void (*init_ielcd)(unsigned int ielcd_base, void *l, void *c);
-#endif
+ void (*set_display_path)(void);
void (*cfg_gpio)(struct platform_device *dev);
int (*backlight_on)(struct platform_device *dev);
int (*backlight_off)(struct platform_device *dev);
@@ -86,6 +56,7 @@ struct s3c_platform_fb {
extern void s3cfb_set_platdata(struct s3c_platform_fb *fimd);
/* defined by architecture to configure gpio */
+extern void s3cfb_set_display_path(void);
extern void s3cfb_cfg_gpio(struct platform_device *pdev);
extern int s3cfb_backlight_on(struct platform_device *pdev);
extern int s3cfb_backlight_off(struct platform_device *pdev);
diff --git a/arch/arm/plat-s5p/include/plat/regs-fb-s5p.h b/arch/arm/plat-s5p/include/plat/regs-fb-s5p.h
index b616f2c..9aaf890 100644
--- a/arch/arm/plat-s5p/include/plat/regs-fb-s5p.h
+++ b/arch/arm/plat-s5p/include/plat/regs-fb-s5p.h
@@ -146,6 +146,7 @@
#define S3C_BLENDEQ3 (0x024C) /* Window 3 blending equation control */
#define S3C_BLENDEQ4 (0x0250) /* Window 4 blending equation control */
#define S3C_BLENDCON (0x0260) /* Blending control */
+#define S3C_DUALRGB (0x027C) /* DUALRGB INTERFACE SETTING REGISTER */
#define S3C_SHD_WIN_BASE (0x4000) /* Shadow Window control reg Base */
/*
* Bit Definitions
@@ -412,4 +413,10 @@
/* WxKEYCON1 (1~4) */
#define S3C_KEYCON1_COLVAL(x) (((x) & 0xffffff) << 0)
+/* DUALRGB */
+#define S3C_DUALRGB_BYPASS_SINGLE (0 << 0)
+#define S3C_DUALRGB_BYPASS_DUAL (1 << 0)
+#define S3C_DUALRGB_MIE_DUAL (2 << 0)
+#define S3C_DUALRGB_MDNIE (3 << 0)
+
#endif /* __ASM_PLAT_REGS_FB_S5P_H */