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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-05 18:18:05 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-05 18:18:05 -0700
commit7abec10c623d9e0416dab6919a0ea22e6283516b (patch)
tree83aa79c369e99c4fc60eea91ebd399b7689b312e /arch/arm/plat-samsung/include/plat/irqs.h
parent0de9adf284ec20454ecf37ffd98e7e98ba7292d6 (diff)
parentcfaf8fc5b59527281e9ddc2e0e04e1127936e17f (diff)
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Merge branch 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc: (79 commits) ARM: SAMSUNG: Move fimc plat. device from board files to plat-samsung ARM: SAMSUNG: Cleanup resources by using macro ARM: SAMSUNG: Cleanup plat-samsung/devs.c and devs.h ARM: S5P: To merge devs.c files to one devs.c ARM: S3C64XX: To merge devs.c files to one devs.c ARM: S3C24XX: To merge s3c24xx devs.c files to one devs.c ARM: S5P64X0: Add Power Management support ARM: S5P: Make the sleep code common for S5P series SoCs ARM: S5P: Make the common S5P PM code conditionally compile ARM: SAMSUNG: Move S5P header files to plat-samsung ARM: SAMSUNG: Move S3C24XX header files to plat-samsung ARM: SAMSUNG: Moving each SoC support header files ARM: SAMSUNG: Consolidate plat/pll.h ARM: SAMSUNG: Consolidate plat/pwm-clock.h ARM: SAMSUNG: Cleanup mach/clkdev.h ARM: SAMSUNG: remove sdhci default configuration setup platform helper ARM: EXYNOS4: Add FIMC device on SMDKV310 board ARM: EXYNOS4: Add header file protection macros ARM: EXYNOS4: Add usb ehci device to the SMDKV310 ARM: S3C2443: Add hsspi-clock from pclk and rename S3C2443 hsspi sclk ... Fix up conflicts in - arch/arm/mach-exynos4/{Kconfig,clock.c} ARM_CPU_SUSPEND, various random device tables (gah!) - drivers/gpio/Makefile sa1100 gpio added, samsung gpio drivers merged
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/irqs.h')
-rw-r--r--arch/arm/plat-samsung/include/plat/irqs.h80
1 files changed, 80 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
new file mode 100644
index 0000000..08d1a7e
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -0,0 +1,80 @@
+/* linux/arch/arm/plat-samsung/include/plat/irqs.h
+ *
+ * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * S5P Common IRQ support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_SAMSUNG_IRQS_H
+#define __PLAT_SAMSUNG_IRQS_H __FILE__
+
+/* we keep the first set of CPU IRQs out of the range of
+ * the ISA space, so that the PC104 has them to itself
+ * and we don't end up having to do horrible things to the
+ * standard ISA drivers....
+ *
+ * note, since we're using the VICs, our start must be a
+ * mulitple of 32 to allow the common code to work
+ */
+
+#define S5P_IRQ_OFFSET (32)
+
+#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET)
+
+#define S5P_VIC0_BASE S5P_IRQ(0)
+#define S5P_VIC1_BASE S5P_IRQ(32)
+#define S5P_VIC2_BASE S5P_IRQ(64)
+#define S5P_VIC3_BASE S5P_IRQ(96)
+
+#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
+
+#define IRQ_VIC0_BASE S5P_VIC0_BASE
+#define IRQ_VIC1_BASE S5P_VIC1_BASE
+#define IRQ_VIC2_BASE S5P_VIC2_BASE
+
+/* VIC based IRQs */
+
+#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
+#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
+#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
+#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
+
+#define S5P_TIMER_IRQ(x) (11 + (x))
+
+#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
+#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
+#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
+#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
+#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
+
+#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
+ : ((x) - 16 + S5P_EINT_BASE2))
+
+#define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \
+ ((irq) - S5P_EINT_BASE1) : \
+ ((irq) + 16 - S5P_EINT_BASE2))
+
+#define IRQ_EINT_BIT(x) EINT_OFFSET(x)
+
+/* Typically only a few gpio chips require gpio interrupt support.
+ To avoid memory waste irq descriptors are allocated only for
+ S5P_GPIOINT_GROUP_COUNT chips, each with total number of
+ S5P_GPIOINT_GROUP_SIZE pins/irqs. Each GPIOINT group can be assiged
+ to any gpio chip with the s5p_register_gpio_interrupt() function */
+#define S5P_GPIOINT_GROUP_COUNT 4
+#define S5P_GPIOINT_GROUP_SIZE 8
+#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE)
+
+/* IRQ types common for all s5p platforms */
+#define S5P_IRQ_TYPE_LEVEL_LOW (0x00)
+#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01)
+#define S5P_IRQ_TYPE_EDGE_FALLING (0x02)
+#define S5P_IRQ_TYPE_EDGE_RISING (0x03)
+#define S5P_IRQ_TYPE_EDGE_BOTH (0x04)
+
+#endif /* __PLAT_SAMSUNG_IRQS_H */