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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-01-19 17:30:52 -0700 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-01-19 17:30:52 -0700 |
commit | 6468e3b18777ecfffa6738e365896be9f17403f2 (patch) | |
tree | 0c8323159c431d60b9397a594a14e375ba3da429 /arch/arm | |
parent | 883edfdd58419b0cc298db14ba25c26d55c6d1af (diff) | |
download | kernel_samsung_smdk4412-6468e3b18777ecfffa6738e365896be9f17403f2.zip kernel_samsung_smdk4412-6468e3b18777ecfffa6738e365896be9f17403f2.tar.gz kernel_samsung_smdk4412-6468e3b18777ecfffa6738e365896be9f17403f2.tar.bz2 |
OMAP3: clock: Remove unnecessarily .init initializers from OMAP3 clocks
The first thing that omap2_init_clksel_parent() does is check for
a non-zero .clksel field in the struct clk. Therefore, it is
pointless calling this function on clocks where the clksel field
is unset.
Remove init calls to omap2_init_clksel_parent() on clocks without
a clksel field.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/clock34xx_data.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index c6031d7..74930e3 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c @@ -671,7 +671,6 @@ static struct clk dpll4_m3x2_ck = { .name = "dpll4_m3x2_ck", .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m3_ck, - .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_TV_SHIFT, .flags = INVERT_ENABLE, @@ -811,7 +810,6 @@ static struct clk dpll4_m6x2_ck = { .name = "dpll4_m6x2_ck", .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m6_ck, - .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT, .flags = INVERT_ENABLE, @@ -1047,7 +1045,6 @@ static struct clk iva2_ck = { .name = "iva2_ck", .ops = &clkops_omap2_dflt_wait, .parent = &dpll2_m2_ck, - .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, .clkdm_name = "iva2_clkdm", @@ -1121,7 +1118,6 @@ static struct clk gfx_l3_ck = { .name = "gfx_l3_ck", .ops = &clkops_omap2_dflt_wait, .parent = &l3_ick, - .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), .enable_bit = OMAP_EN_GFX_SHIFT, .recalc = &followparent_recalc, |