diff options
author | Ben Dooks <ben@simtec.co.uk> | 2009-03-04 00:49:26 +0000 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-03-05 12:00:59 +0000 |
commit | 8150bc886be5ce3cc301a2baca1fcf2cf7bd7f39 (patch) | |
tree | ed9e73c106d8680fa5256988a01abfa577420717 /arch/arm | |
parent | c59765042f53a79a7a65585042ff463b69cb248c (diff) | |
download | kernel_samsung_smdk4412-8150bc886be5ce3cc301a2baca1fcf2cf7bd7f39.zip kernel_samsung_smdk4412-8150bc886be5ce3cc301a2baca1fcf2cf7bd7f39.tar.gz kernel_samsung_smdk4412-8150bc886be5ce3cc301a2baca1fcf2cf7bd7f39.tar.bz2 |
S3C24XX: Move and update IIS headers
Move the IIS headers to their correct place.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-s3c2410/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/hardware.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/io.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c2412/dma.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c2440/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c2443/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-shark/include/mach/io.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h | 72 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/clock-dclk.c | 1 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/include/plat/regs-iis.h | 77 |
10 files changed, 157 insertions, 10 deletions
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 552b4c7..440c014 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c @@ -28,7 +28,7 @@ #include <mach/regs-mem.h> #include <mach/regs-lcd.h> #include <mach/regs-sdi.h> -#include <asm/plat-s3c24xx/regs-iis.h> +#include <plat/regs-iis.h> #include <plat/regs-spi.h> static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { diff --git a/arch/arm/mach-s3c2410/include/mach/hardware.h b/arch/arm/mach-s3c2410/include/mach/hardware.h index 74d5a1a..db72beb 100644 --- a/arch/arm/mach-s3c2410/include/mach/hardware.h +++ b/arch/arm/mach-s3c2410/include/mach/hardware.h @@ -131,7 +131,4 @@ extern int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state); /* machine specific hardware definitions should go after this */ -/* currently here until moved into config (todo) */ -#define CONFIG_NO_MULTIWORD_IO - #endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s3c2410/include/mach/io.h b/arch/arm/mach-s3c2410/include/mach/io.h index 9813dbf..c477771 100644 --- a/arch/arm/mach-s3c2410/include/mach/io.h +++ b/arch/arm/mach-s3c2410/include/mach/io.h @@ -9,7 +9,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include <mach/hardware.h> +#include <mach/map.h> #define IO_SPACE_LIMIT 0xffffffff diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index 919856c..9e34785 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c @@ -29,8 +29,8 @@ #include <mach/regs-mem.h> #include <mach/regs-lcd.h> #include <mach/regs-sdi.h> -#include <asm/plat-s3c24xx/regs-s3c2412-iis.h> -#include <asm/plat-s3c24xx/regs-iis.h> +#include <plat/regs-s3c2412-iis.h> +#include <plat/regs-iis.h> #include <plat/regs-spi.h> #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index 5b5ee0b..69b6cf3 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c @@ -28,7 +28,7 @@ #include <mach/regs-mem.h> #include <mach/regs-lcd.h> #include <mach/regs-sdi.h> -#include <asm/plat-s3c24xx/regs-iis.h> +#include <plat/regs-iis.h> #include <plat/regs-spi.h> static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c index 2a58a4d..8430e58 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c2443/dma.c @@ -29,7 +29,7 @@ #include <mach/regs-mem.h> #include <mach/regs-lcd.h> #include <mach/regs-sdi.h> -#include <asm/plat-s3c24xx/regs-iis.h> +#include <plat/regs-iis.h> #include <plat/regs-spi.h> #define MAP(x) { \ diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h index c5cee82..8ca7d7f 100644 --- a/arch/arm/mach-shark/include/mach/io.h +++ b/arch/arm/mach-shark/include/mach/io.h @@ -14,7 +14,7 @@ #define PCIO_BASE 0xe0000000 #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) +#define __io(a) __typesafe_io(PCIO_BASE + (a)) #define __mem_pci(addr) (addr) #endif diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h new file mode 100644 index 0000000..25d4058 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h @@ -0,0 +1,72 @@ +/* linux/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h + * + * Copyright 2007 Simtec Electronics <linux@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2412 IIS register definition +*/ + +#ifndef __ASM_ARCH_REGS_S3C2412_IIS_H +#define __ASM_ARCH_REGS_S3C2412_IIS_H + +#define S3C2412_IISCON (0x00) +#define S3C2412_IISMOD (0x04) +#define S3C2412_IISFIC (0x08) +#define S3C2412_IISPSR (0x0C) +#define S3C2412_IISTXD (0x10) +#define S3C2412_IISRXD (0x14) + +#define S3C2412_IISCON_LRINDEX (1 << 11) +#define S3C2412_IISCON_TXFIFO_EMPTY (1 << 10) +#define S3C2412_IISCON_RXFIFO_EMPTY (1 << 9) +#define S3C2412_IISCON_TXFIFO_FULL (1 << 8) +#define S3C2412_IISCON_RXFIFO_FULL (1 << 7) +#define S3C2412_IISCON_TXDMA_PAUSE (1 << 6) +#define S3C2412_IISCON_RXDMA_PAUSE (1 << 5) +#define S3C2412_IISCON_TXCH_PAUSE (1 << 4) +#define S3C2412_IISCON_RXCH_PAUSE (1 << 3) +#define S3C2412_IISCON_TXDMA_ACTIVE (1 << 2) +#define S3C2412_IISCON_RXDMA_ACTIVE (1 << 1) +#define S3C2412_IISCON_IIS_ACTIVE (1 << 0) + +#define S3C2412_IISMOD_MASTER_INTERNAL (0 << 10) +#define S3C2412_IISMOD_MASTER_EXTERNAL (1 << 10) +#define S3C2412_IISMOD_SLAVE (2 << 10) +#define S3C2412_IISMOD_MASTER_MASK (3 << 10) +#define S3C2412_IISMOD_MODE_TXONLY (0 << 8) +#define S3C2412_IISMOD_MODE_RXONLY (1 << 8) +#define S3C2412_IISMOD_MODE_TXRX (2 << 8) +#define S3C2412_IISMOD_MODE_MASK (3 << 8) +#define S3C2412_IISMOD_LR_LLOW (0 << 7) +#define S3C2412_IISMOD_LR_RLOW (1 << 7) +#define S3C2412_IISMOD_SDF_IIS (0 << 5) +#define S3C2412_IISMOD_SDF_MSB (0 << 5) +#define S3C2412_IISMOD_SDF_LSB (0 << 5) +#define S3C2412_IISMOD_SDF_MASK (3 << 5) +#define S3C2412_IISMOD_RCLK_256FS (0 << 3) +#define S3C2412_IISMOD_RCLK_512FS (1 << 3) +#define S3C2412_IISMOD_RCLK_384FS (2 << 3) +#define S3C2412_IISMOD_RCLK_768FS (3 << 3) +#define S3C2412_IISMOD_RCLK_MASK (3 << 3) +#define S3C2412_IISMOD_BCLK_32FS (0 << 1) +#define S3C2412_IISMOD_BCLK_48FS (1 << 1) +#define S3C2412_IISMOD_BCLK_16FS (2 << 1) +#define S3C2412_IISMOD_BCLK_24FS (3 << 1) +#define S3C2412_IISMOD_BCLK_MASK (3 << 1) +#define S3C2412_IISMOD_8BIT (1 << 0) + +#define S3C2412_IISPSR_PSREN (1 << 15) + +#define S3C2412_IISFIC_TXFLUSH (1 << 15) +#define S3C2412_IISFIC_RXFLUSH (1 << 7) +#define S3C2412_IISFIC_TXCOUNT(x) (((x) >> 8) & 0xf) +#define S3C2412_IISFIC_RXCOUNT(x) (((x) >> 0) & 0xf) + + + +#endif /* __ASM_ARCH_REGS_S3C2412_IIS_H */ + diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c index 5b75a79..35219dc 100644 --- a/arch/arm/plat-s3c24xx/clock-dclk.c +++ b/arch/arm/plat-s3c24xx/clock-dclk.c @@ -18,6 +18,7 @@ #include <mach/regs-clock.h> #include <mach/regs-gpio.h> +#include <mach/hardware.h> #include <plat/clock.h> #include <plat/cpu.h> diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h new file mode 100644 index 0000000..a6f1d5d --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h @@ -0,0 +1,77 @@ +/* arch/arm/mach-s3c2410/include/mach/regs-iis.h + * + * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> + * http://www.simtec.co.uk/products/SWLINUX/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2410 IIS register definition +*/ + +#ifndef __ASM_ARCH_REGS_IIS_H +#define __ASM_ARCH_REGS_IIS_H + +#define S3C2410_IISCON (0x00) + +#define S3C2410_IISCON_LRINDEX (1<<8) +#define S3C2410_IISCON_TXFIFORDY (1<<7) +#define S3C2410_IISCON_RXFIFORDY (1<<6) +#define S3C2410_IISCON_TXDMAEN (1<<5) +#define S3C2410_IISCON_RXDMAEN (1<<4) +#define S3C2410_IISCON_TXIDLE (1<<3) +#define S3C2410_IISCON_RXIDLE (1<<2) +#define S3C2410_IISCON_PSCEN (1<<1) +#define S3C2410_IISCON_IISEN (1<<0) + +#define S3C2410_IISMOD (0x04) + +#define S3C2440_IISMOD_MPLL (1<<9) +#define S3C2410_IISMOD_SLAVE (1<<8) +#define S3C2410_IISMOD_NOXFER (0<<6) +#define S3C2410_IISMOD_RXMODE (1<<6) +#define S3C2410_IISMOD_TXMODE (2<<6) +#define S3C2410_IISMOD_TXRXMODE (3<<6) +#define S3C2410_IISMOD_LR_LLOW (0<<5) +#define S3C2410_IISMOD_LR_RLOW (1<<5) +#define S3C2410_IISMOD_IIS (0<<4) +#define S3C2410_IISMOD_MSB (1<<4) +#define S3C2410_IISMOD_8BIT (0<<3) +#define S3C2410_IISMOD_16BIT (1<<3) +#define S3C2410_IISMOD_BITMASK (1<<3) +#define S3C2410_IISMOD_256FS (0<<2) +#define S3C2410_IISMOD_384FS (1<<2) +#define S3C2410_IISMOD_16FS (0<<0) +#define S3C2410_IISMOD_32FS (1<<0) +#define S3C2410_IISMOD_48FS (2<<0) +#define S3C2410_IISMOD_FS_MASK (3<<0) + +#define S3C2410_IISPSR (0x08) +#define S3C2410_IISPSR_INTMASK (31<<5) +#define S3C2410_IISPSR_INTSHIFT (5) +#define S3C2410_IISPSR_EXTMASK (31<<0) +#define S3C2410_IISPSR_EXTSHFIT (0) + +#define S3C2410_IISFCON (0x0c) + +#define S3C2410_IISFCON_TXDMA (1<<15) +#define S3C2410_IISFCON_RXDMA (1<<14) +#define S3C2410_IISFCON_TXENABLE (1<<13) +#define S3C2410_IISFCON_RXENABLE (1<<12) +#define S3C2410_IISFCON_TXMASK (0x3f << 6) +#define S3C2410_IISFCON_TXSHIFT (6) +#define S3C2410_IISFCON_RXMASK (0x3f) +#define S3C2410_IISFCON_RXSHIFT (0) + +#define S3C2400_IISFCON_TXDMA (1<<11) +#define S3C2400_IISFCON_RXDMA (1<<10) +#define S3C2400_IISFCON_TXENABLE (1<<9) +#define S3C2400_IISFCON_RXENABLE (1<<8) +#define S3C2400_IISFCON_TXMASK (0x07 << 4) +#define S3C2400_IISFCON_TXSHIFT (4) +#define S3C2400_IISFCON_RXMASK (0x07) +#define S3C2400_IISFCON_RXSHIFT (0) + +#define S3C2410_IISFIFO (0x10) +#endif /* __ASM_ARCH_REGS_IIS_H */ |