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| author | Greg Ungerer <gerg@uclinux.org> | 2011-06-22 13:50:44 +1000 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2011-10-18 14:22:25 +1000 |
| commit | 61619b12078dc8b85a3d4cbfa16f650daa341bd1 (patch) | |
| tree | e1971eca6707ddc7fad852a6c7e29a3ad8766aee /arch/m68k/platform/68360/entry.S | |
| parent | 0a01b310fe6319d88690bd5a329c9e6a82ce7011 (diff) | |
| download | kernel_samsung_smdk4412-61619b12078dc8b85a3d4cbfa16f650daa341bd1.zip kernel_samsung_smdk4412-61619b12078dc8b85a3d4cbfa16f650daa341bd1.tar.gz kernel_samsung_smdk4412-61619b12078dc8b85a3d4cbfa16f650daa341bd1.tar.bz2 | |
m68k: merge mmu and non-mmu include/asm/entry.h files
The changes in the mmu version of entry.h (entry_mm.h) and the non-mmu
version (entry_no.h) are not about the presence or use of an MMU at all.
The main changes are to support the ColdFire processors. The code for
trap entry and exit for all types of 68k processor outside coldfire is
the same.
So merge the files back to a single entry.h and share the common 68k
entry/exit code. Some changes are required for the non-mmu entry
handlers to adopt the differing macros for system call and interrupt
entry, but this is quite strait forward. The changes for the ColdFire
remove a couple of instructions for the separate a7 register case, and
are no worse for the older single a7 register case.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform/68360/entry.S')
| -rw-r--r-- | arch/m68k/platform/68360/entry.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/m68k/platform/68360/entry.S b/arch/m68k/platform/68360/entry.S index abbb896..aa47d1d 100644 --- a/arch/m68k/platform/68360/entry.S +++ b/arch/m68k/platform/68360/entry.S @@ -63,7 +63,7 @@ ret_from_signal: jra ret_from_exception ENTRY(system_call) - SAVE_ALL + SAVE_ALL_SYS /* save top of frame*/ pea %sp@ @@ -125,7 +125,7 @@ Lsignal_return: * This is the main interrupt handler, responsible for calling do_IRQ() */ inthandler: - SAVE_ALL + SAVE_ALL_INT movew %sp@(PT_OFF_FORMATVEC), %d0 and.l #0x3ff, %d0 lsr.l #0x02, %d0 |