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authorManuel Lauss <manuel.lauss@googlemail.com>2011-08-12 11:39:40 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-10-24 23:34:24 +0100
commit7cc2e272da3d88c0de9e05b32729402785bd9206 (patch)
tree47abef81764180bad7399eba690a0407260cf3b0 /arch/mips/include/asm/mach-db1x00/db1x00.h
parentb9581b84884eac4146720817a6eb0672074284fb (diff)
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MIPS: Alchemy: more base address cleanup
remove all redundant peripheral base address defines, fix all affected boards and drivers. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2700/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-db1x00/db1x00.h')
-rw-r--r--arch/mips/include/asm/mach-db1x00/db1x00.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/include/asm/mach-db1x00/db1x00.h b/arch/mips/include/asm/mach-db1x00/db1x00.h
index a919dac..115cc7c 100644
--- a/arch/mips/include/asm/mach-db1x00/db1x00.h
+++ b/arch/mips/include/asm/mach-db1x00/db1x00.h
@@ -36,10 +36,10 @@
#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
-#define SPI_PSC_BASE PSC0_BASE_ADDR
-#define AC97_PSC_BASE PSC1_BASE_ADDR
-#define SMBUS_PSC_BASE PSC2_BASE_ADDR
-#define I2S_PSC_BASE PSC3_BASE_ADDR
+#define SPI_PSC_BASE AU1550_PSC0_PHYS_ADDR
+#define AC97_PSC_BASE AU1550_PSC1_PHYS_ADDR
+#define SMBUS_PSC_BASE AU1550_PSC2_PHYS_ADDR
+#define I2S_PSC_BASE AU1550_PSC3_PHYS_ADDR
#define NAND_PHYS_ADDR 0x20000000