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authorScott Wood <scottwood@freescale.com>2010-04-08 00:38:22 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-05-21 07:41:52 -0500
commitfe04b1121511a97982a1fcdd38e44d2029304a6d (patch)
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parent99ec28f183daa450faa7bdad6f932364ae325648 (diff)
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powerpc/e500mc: Implement machine check handler.
Most of the MSCR bit assigments are different in e500mc versus e500, and they are now write-one-to-clear. Some e500mc machine check conditions are made recoverable (as long as they aren't stuck on), most notably L1 instruction cache parity errors. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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