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author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2012-11-07 10:44:08 +0100 |
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committer | Ben Hutchings <ben@decadent.org.uk> | 2012-12-06 11:20:04 +0000 |
commit | b6908c5824b42966d700c10a9c4241b5f82119e1 (patch) | |
tree | 95ca55db40692c7a77deab4d3d7903c463f78303 /arch/s390/include/asm/compat.h | |
parent | 5f7f7869750172ec1af2b3c489bd943db9086a2a (diff) | |
download | kernel_samsung_smdk4412-b6908c5824b42966d700c10a9c4241b5f82119e1.zip kernel_samsung_smdk4412-b6908c5824b42966d700c10a9c4241b5f82119e1.tar.gz kernel_samsung_smdk4412-b6908c5824b42966d700c10a9c4241b5f82119e1.tar.bz2 |
s390/signal: set correct address space control
commit fa968ee215c0ca91e4a9c3a69ac2405aae6e5d2f upstream.
If user space is running in primary mode it can switch to secondary
or access register mode, this is used e.g. in the clock_gettime code
of the vdso. If a signal is delivered to the user space process while
it has been running in access register mode the signal handler is
executed in access register mode as well which will result in a crash
most of the time.
Set the address space control bits in the PSW to the default for the
execution of the signal handler and make sure that the previous
address space control is restored on signal return. Take care
that user space can not switch to the kernel address space by
modifying the registers in the signal frame.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
[bwh: Backported to 3.2:
- Adjust filename
- The RI bit is not included in PSW_MASK_USER]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'arch/s390/include/asm/compat.h')
-rw-r--r-- | arch/s390/include/asm/compat.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h index 234f1d8..2e0a15b 100644 --- a/arch/s390/include/asm/compat.h +++ b/arch/s390/include/asm/compat.h @@ -20,7 +20,7 @@ #define PSW32_MASK_CC 0x00003000UL #define PSW32_MASK_PM 0x00000f00UL -#define PSW32_MASK_USER 0x00003F00UL +#define PSW32_MASK_USER 0x0000FF00UL #define PSW32_ADDR_AMODE 0x80000000UL #define PSW32_ADDR_INSN 0x7FFFFFFFUL |